ZSSC3123AI2R datasheet(49/67 Pages) RENESAS

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ZSSC3123 Datasheet

August 16, 2018

12.2 Capacitance Analog Front-End Configuration (C_Config, EEPROM Word 06HEX)

This register is loaded immediately before a capacitance measurement is taken, so a power cycle is not needed for changes to take effect.

Table 30. C_Config Bit Assignments

Bit Range

IC Default

Name

Description and Notes

2:0

110BIN

CDC_Reference

CDC reference capacitor selection (see Table 6 to Table 9)

5:3

000BIN

CDC_Offset

CDC offset capacitor selection (see Table 6 to Table 9)

9:6

0000BIN

Not Available

Do Not Change – must leave at factory settings

11:10

11BIN

Resolution

CDC resolution and sample rate: [a]

00BIN = 8 bits at 0.7ms rate

01BIN = 10 bits at 1.6ms rate

10BIN = 12 bits at 5.0ms rate

11BIN = 14 bits at 18.5ms rate

13:12

00BIN

CDC_Mult

CDC Multiplier:

00BIN = 1 (2pF to 8pF)

01BIN = 2 (8pF to 32pF)

10BIN = 4 (32pF to 130pF)

11BIN = 8 (130pF to 260pF)

0BIN

Differential

Differential input capacitance selection:

0 = Single-ended

1 = Differential

0BIN

Not Available

Do Not Change – must leave at factory settings

[a] All time values shown are typical; for the worst case values, multiply by 1.1 (nominal frequency ±10%). See section 10.2 for additional

timing factors.

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