VSC8221 datasheet(128/138 Pages) MICROSEMI

128 / 138 page

VSC8221

Data Sheet

VMDS-10106 Revision 4.1

December 2006

128 of 132

132

31.6 Software Reset Time

Description: The VSC8221 device’s software reset timing depends on the values of its Mii Register 22.9 (Sticky Reset Enable)

and its Extended Mii Register 21.14 (Re-Read EEPROM on Software Reset).

For more information, see Register 0 (00h) – Mode Control Register, page 67, Register 21E (15h) - EEPROM interface Status

and Control Register, page 101, and Register 22 (16h) – Control & Status Register, page 84.

impact: May cause errors if sufficient delay is not added between software reset and the next register access.

Workaround: System software must ensure that adequate delay is inserted between software reset and the next register

address.

31.7 Reducing EMi

Description: in systems that do not use the CLKOUT or the CLKOUTmicro outputs, radiated emissions can be reduced by

disabling these outputs. Under the default PHY settings, CLKOUT and CLKOUTmicro are enabled.

impact: Reduction of radiated emissions by disabling these unused clock outputs may enable customers to use less expensive

system enclosures or shielding methods to reduce system cost.

Workaround: For information about enabling or disabling the CLKOUT output, see Register 18 (12h) – Bypass Control

Control Register, page 98.

Table 61. Software Reset Times

Sticky Reset

Enable (22.9)

Re-Read

EEPROM

(21E.14)

Reset Time

4 microseconds (default)

300 microseconds

200 milliseconds

VSC8221 Datasheet(PDF) 128 Page - Microsemi Corporation