VSC8221 datasheet(137/138 Pages) MICROSEMI

137 / 138 page

VSC8221

Data Sheet

VMDS-10106 Revision 4.1

December 2006

137 of 138

138

4.1

December 06

•

in the media converter application diagram, the RJ-45 speed was corrected from 10/

100/1000BASE-T to 1000BASE-T.

•

Throughout the datasheet, information was added regarding the 100BASE-FX

mode. The following lists the main information:

– For information about twisted pair signals in 100BASE-FX mode, see Table 12:

“Twisted Pair interface Signals”.

– For information about 100BASE-FX system schematics, see Figure 5: "System

Schematic - 100Mbps Fiber Media implementation".

– For information about 100BASE-FX connections and initialization, see Section

10.6: "100Mbps Fiber Support Over Copper Media interface" and Section 31.10:

"100BASE-FX initialization Script".

– For information about 100BASE-FX current consumption, see Table 45: “VDDiO

at 3.3V SGMii-100BASE-FX, SFP Mode Off”.

•

in the listing of JTAG interface instruction codes, the register width given for the

instructions EXTEST and SAMPLE/PRELOAD was corrected from 196 bits to

72 bits.

•

in the reset AC timing diagram, the MDiO signal pulse width was widened to be

more accurate relative to the pulse width of the REFCLK signal. For more

information about this specification, see Figure 30: "RESET AC Timing".

•

in the reset AC timing specifications, TREADY signal, a condition was added that if

EEPROM is present, an additional 100ms is required. For more information about

reset AC timing, see Table 59: “RESET AC Timing Specification”.

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VSC8221 Datasheet(PDF) 137 Page - Microsemi Corporation