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ATMEGA640 Datasheet(PDF) 168 Page - Microchip Technology |
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ATMEGA640 Datasheet(HTML) 168 Page - Microchip Technology |
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168 / 436 page  168 ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET] DS40002211A 19.2.1 Timing example Figure 19-3 illustrates the modulator in action. In this example the Timer/Counter1 is set to operate in fast PWM mode (non-inverted) and Timer/Counter0 uses CTC waveform mode with toggle Compare Output mode (COM- nx1:0 = 1). Figure 19-3. Output Compare Modulator, Timing Diagram In this example, Timer/Counter2 provides the carrier, while the modulating signal is generated by the Output Com- pare unit C of the Timer/Counter1. The resolution of the PWM signal (OC1C) is reduced by the modulation. The reduction factor is equal to the num- ber of system clock cycles of one period of the carrier (OC0A). In this example the resolution is reduced by a factor of two. The reason for the reduction is illustrated in Figure 19-3 at the second and third period of the PB7 output when PORTB7 equals zero. The period 2 high time is one cycle longer than the period 3 high time, but the result on the PB7 output is equal in both periods. 1 2 OC0A (CTC Mode) OC1C (FPWM Mode) PB7 (PORTB7 = 0) PB7 (PORTB7 = 1) (Period) 3 clk I/O |
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