ATMEGA640 datasheet(171/436 Pages) MICROCHIP

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

Figure 20-2. Counter Unit Block Diagram

Signal description (internal signals):

count

Increment or decrement TCNT2 by 1.

direction

Selects between increment and decrement.

clear

Clear TCNT2 (set all bits to zero).

clkTn

Timer/Counter clock, referred to as clkT2 in the following.

top

Signalizes that TCNT2 has reached maximum value.

bottom

Signalizes that TCNT2 has reached minimum value (zero).

Depending on the mode of operation used, the counter is cleared, incremented, or decremented at each timer

clock (clkT2). clkT2 can be generated from an external or internal clock source, selected by the Clock Select bits

(CS22:0). When no clock source is selected (CS22:0 = 0) the timer is stopped. However, the TCNT2 value can be

accessed by the CPU, regardless of whether clkT2 is present or not. A CPU write overrides (has priority over) all

counter clear or count operations.

The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in the Timer/Counter

Control Register (TCCR2A) and the WGM22 located in the Timer/Counter Control Register B (TCCR2B). There

are close connections between how the counter behaves (counts) and how waveforms are generated on the Out-

put Compare outputs OC2A and OC2B. For more details about advanced counting sequences and waveform

generation, see “Modes of Operation” .

The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by the WGM22:0 bits.

TOV2 can be used for generating a CPU interrupt.

20.4 Modes of Operation

The mode of operation, that is, the behavior of the Timer/Counter and the Output Compare pins, is defined by the

combination of the Waveform Generation mode (WGM22:0) and Compare Output mode (COM2x1:0) bits. The

Compare Output mode bits do not affect the counting sequence, while the Waveform Generation mode bits do.

The COM2x1:0 bits control whether the PWM output generated should be inverted or not (inverted or non-inverted

PWM). For non-PWM modes the COM2x1:0 bits control whether the output should be set, cleared, or toggled at a

compare match. See “Compare Match Output Unit” on page 176.

For detailed timing information refer to “Timer/Counter Timing Diagrams” on page 177.

DATA BUS

TCNTn

Control Logic

count

TOVn

(Int.Req.)

top

bottom

direction

clear

TOSC1

T/C

Oscillator

TOSC2

Prescaler

clk

I/O

clk

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