MAX1124 datasheet(3/20 Pages) MAXIM

3 / 20 page

1.8V, 12-Bit, 170Msps ADC for

Broadband Applications

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVCC = OVCC = 1.8V, AGND = OGND = 0, fSAMPLE = 170MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,

internal reference, digital output pins differential RL = 100

Ω±1%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at

TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CLOCK INPUTS (CLKP, CLKN)

Differential Clock Input Amplitude

(Note 3)

200

500

mVP-P

Clock Input Common-Mode

Voltage Range

Internally self-biased

1.15 ±0.25

Clock Differential Input

Resistance

RCLK

±25%

Ω

Clock Differential Input

Capacitance

CCLK

5pF

DYNAMIC CHARACTERISTICS (at -1dBFS)

fIN = 10MHz, TA

≥ +25°C

64.5

66.2

fIN = 65MHz, TA

≥ +25°C

64.5

65.8

fIN = 200MHz

Signal-to-Noise

Ratio

SNR

fIN = 250MHz

64.5

fIN = 10MHz, TA

≥ +25°C64

65.9

fIN = 65MHz, TA

≥ +25°C

63.5

65.2

fIN = 200MHz

63.9

Signal-to-Noise

and Distortion

SINAD

fIN = 250MHz

63.5

fIN = 10MHz, TA

≥ +25°C73

fIN = 65MHz, TA

≥ +25°C69

76.5

fIN = 200MHz

70.7

Spurious-Free

Dynamic Range

SFDR

fIN = 250MHz

72.9

dBc

fIN = 10MHz, TA

≥ +25°C

-85

-73

fIN = 65MHz, TA

≥ +25°C

-76.5

-69

fIN = 200MHz

-70.7

Worst Harmonics

(HD2 or HD3)

fIN = 250MHz

-72.9

dBc

Two-Tone Intermodulation

Distortion

TTIMD

fIN1 = 99MHz at -7dBFS,

fIN2 = 101MHz at -7dBFS

-78

dBc

Noise Power Ratio

NPR

fNOTCH = 28.8MHz

±1MHz,

noise BW = 50MHz, AIN = -9.1dBFS

59.5

LVDS DIGITAL OUTPUTS (D0P/N–D11P/N, ORP/N)

Differential Output Voltage

|VOD|RL = 100

Ω ±1%

250

400

Output Offset Voltage

OVOS

RL = 100

Ω ±1%

1.125

1.310

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