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XD6702 Datasheet(PDF) 11 Page - Torex Semiconductor

Part # XD6702
Description  36V input, 300mA low supply current, high speed voltage regulators
PDF  27 Pages
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Manufacturer  TOREX [Torex Semiconductor]
Direct Link  http://www.torex.co.jp
Logo TOREX - Torex Semiconductor

XD6702 Datasheet(HTML) 11 Page - Torex Semiconductor

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XD6702
Series
CE“H”Level Voltage
VCE 0V→VIN
VOUT(T)×0.9V
VOUT
Time[μs]
Voltage [V]
Current [mA]
IIN
IRUSH
tSS
0
50
100
150
200
250
300
350
400
450
500
-7.5
-6.0
-4.5
-3.0
-1.5
0.0
1.5
3.0
4.5
6.0
7.5
Time (100
μs/div)
XD6702D501PR-Q
CL=2.2μF
CL=4.7μF
CL=10μF
CE Input Voltage
Output Voltage
Inrush Current
Ta=25℃, V
IN=6.0V, IOUT=1mA,
V
CE=0V→6.0V, tr=5.0μs
Table 1: Recommended capacitance values (MIN) of CIN and CL
OUTPUT VOLTAGE
RANGE
INPUT
CAPACITOR
OUTPUT
CAPACITOR
VOUT(T)
CIN
CL
1.8V ~ 18.0V
1.0μF
2.2μF
■OPERATIONAL EXPLANATION (Continued)
<Low ESR capacitor support>
An internal phase compensation circuit is incorporated in the XD6702 series to enable a stable output voltage to be
obtained even when a low ESR capacitor is used. To stabilize the effect of the phase compensation circuit, always connect
the output capacitor (CL) in direct proximity to the VOUT pin and VSS pin. In addition, to stabilize the input power, connect
the input capacitor (CIN) in direct proximity to the VIN pin and VSS pin. Refer to Table 1 for the recommended capacitance
values to be connected.
Take particular care in selecting the capacitors for CIN and CL, as the bias dependence of the capacitor, the effect of
capacitance loss due to temperature characteristics and other factors, and the effects of ESR may prevent stable phase
compensation. Table 1 shows recommended capacitance values (MIN) for the actual bias and temperature conditions
used for the capacitor. Select capacitances that satisfy Table 1 in all environments in which the product is to be used.
<Soft start>
The XD6702 series limits the rush current (IRUSH) that suddenly flows from VIN to VOUT to charge the output capacitor (CL)
when the IC starts, and is also able to limit fluctuations of VIN due to IRUSH.
The soft start time(tss) is optimized
internally(370μs TYP.). The soft start time(tss) is defined as the VOUT reaches 90% of VOUT(T) from the time when CE H
threshold is input to the CE pin.
Timing chart at IC start-up
Example of the inrush current wave form at IC start-up



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