VT8601 Apollo ProMedia
Revision 1.3 September 8, 1999
-89
VGA Extended Registers
7HFKQRORJLHV ,QF
:H&
:H&RRQQHFW
QQHFW
GR28-27 – GPIO Control .................................................RW
15-8 GPIO Direction 7-0
0
Read .....................................................default
1
Write
7-0
GPIO Data 7-0.......................................... default = 0
GR2A – Suspend Pin Timer .............................................RW
7
Motion Video Port Suspend
0
Disable ...................................................default
1Enable
6-0
Reserved
........................................ always reads 0
GR2C – Miscellaneous Pin Control .................................RW
7
Reserved
........................................ always reads 0
6
Use PDINV pin as GPIO5
0
Disable ...................................................default
1Enable
5-4
Reserved
........................................ always reads 0
3
Use INT# pin as PSTATUS
0
Disable ...................................................default
1Enable
2
Tristate P35-0, DE, SFCLK, LP, FLM
0
Tristate ...................................................default
1Enable
1
Tristate ENPVEE, ENPVDD, ENPBLT
0
Tristate ...................................................default
1Enable
0
Reserved
........................................ always reads 0
GR2F – Miscellaneous Internal Control......................... RW
7
PCLK Control
0
VGA Compatible ................................... default
1
PCLK equals VCLK
6
Reserved
........................................ always reads 0
5
Hsync Skew Control
0
One skew in graphics, two skew in text . default
1No skew
4-3
Reserved
........................................ always reads 0
2
Double Logical Line Width
0
Disable................................................... default
1Enable
1
Text Mode Display FIFO Prefetch Cycles Select
0
Multiple of 8 .......................................... default
1
Multiple of 4
0
Enable Display FIFO Threshold Control
0
Disable................................................... default
1
Enable (can also be enabled by AR10[0])
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