LM5145 datasheet(25/62 Pages) TI

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In addition to valley current limiting, the LM5145-Q1 uses a proprietary duty-cycle limiter circuit to reduce the

PWM on-time during an overcurrent condition. As shown in Figure 8-10, an auxiliary PWM comparator along

with a modulated CLAMP voltage limits how quickly the on-time increases in response to a large step in the

COMP voltage that typically occurs with a voltage-mode control loop architecture.

As depicted in Figure 8-11, the CLAMP voltage, VCLAMP, is normally regulated above the COMP voltage to

provide adequate headroom during a response to a load-on transient. If the COMP voltage rises quickly during

an overloaded or shorted output condition, the on-time pulse terminates, thereby limiting the on-time and peak

inductor current. Moreover, the CLAMP voltage is reduced if additional valley current limit events occur, further

reducing the average output current. If the overcurrent condition exists for 128 continuous clock cycles, a hiccup

event is triggered and SS is pulled low for 8192 clock cycles before a soft-start sequence is initiated.

8.4 Device Functional Modes

8.4.1 Shutdown Mode

The EN/UVLO pin provides ON / OFF control for the LM5145-Q1. When the EN/UVLO voltage is below 0.37 V

(typical), the device is in shutdown mode. Both the internal bias supply LDO and the switching regulator are off.

The quiescent current in shutdown mode drops to 13.5 μA (typical) at VIN = 48 V. The LM5145-Q1 also includes

undervoltage protection of the internal bias LDO. If the internal bias supply voltage is below its UVLO threshold

level, the switching regulator remains off.

8.4.2 Standby Mode

The internal bias supply LDO has a lower enable threshold than the switching regulator. When the EN/UVLO

voltage exceeds 0.42 V (typical) and is below the precision enable threshold (1.2 V typically), the internal LDO is

on and regulating. Switching action and output voltage regulation are disabled in standby mode.

8.4.3 Active Mode

The LM5145-Q1 is in active mode when the VCC voltage is above its rising UVLO threshold of 5 V and the

EN/UVLO voltage is above the precision EN threshold of 1.2 V. The simplest way to enable the LM5145-Q1 is

to tie EN/UVLO to VIN. This allows self start-up of the LM5145-Q1 when the input voltage exceeds the VCC

threshold plus the LDO dropout voltage from VIN to VCC.

8.4.4 Diode Emulation Mode

The LM5145-Q1 provides a diode emulation feature that can be enabled to prevent reverse (drain-to-source)

current flow in the low-side MOSFET. When configured for diode emulation, the low-side MOSFET is switched

off when reverse current flow is detected by sensing of the SW voltage using a zero-cross comparator. The

benefit of this configuration is lower power loss at no-load and light-load conditions, the disadvantage being

slower light-load transient response.

The diode emulation feature is configured with the SYNCIN pin. To enable diode emulation and thus achieve

discontinuous conduction mode (DCM) operation at light loads, connect the SYNCIN pin to AGND or leave

SYNCIN floating. If forced PWM (FPWM) continuous conduction mode (CCM) operation is desired, tie SYNCIN

to VCC either directly or using a pullup resistor. Note that diode emulation mode is automatically engaged to

prevent reverse current flow during a prebias start-up. A gradual change from DCM to CCM operation provides

monotonic start-up performance.

8.4.5 Thermal Shutdown

The LM5145-Q1 includes an internal junction temperature monitor. If the temperature exceeds 175°C (typical),

thermal shutdown occurs. When entering thermal shutdown, the device:

1. Turns off the high-side and low-side MOSFETs.

2. Pulls SS/TRK and PGOOD low.

3. Turns off the VCC regulator.

4. Initiates a soft-start sequence when the die temperature decreases by the thermal shutdown hysteresis of

20°C (typical).

This is a non-latching protection, and the device will cycle into and out of thermal shutdown if the fault persists.

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LM5145-Q1

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