LM5145 datasheet(22/55 Pages) TI

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Figure 8-6 shows a triangular voltage signal directly driving SS/TRK and the corresponding output voltage

tracking response. Nominal output voltage here is 5 V, with oscilloscope channel scaling chosen such that the

waveforms overlap during tracking. As expected, the PGOOD flag transitions at thresholds of 94% (rising) and

92% (falling) of the nominal output voltage setpoint.

Two practical tracking configurations, ratiometric and coincident, are shown in Figure 8-7. The most common

application is coincident tracking, used in core versus I/O voltage tracking in DSP and FPGA implementations.

Coincident tracking forces the master and slave channels to have the same output voltage ramp rate until the

slave output reaches its regulated setpoint. Conversely, ratiometric tracking sets the output voltage of the slave

to a fraction of the output voltage of the master during start-up.

LM5146

SS/TRK

RTRK1

RTRK2

26.7 k

10 k

VOUTSLAVE1 = 1.8 V

RFB1

RFB2

12.5 k

10 k

0.8 V

LM5146

SS/TRK

RTRK3

RTRK4

20 k

RFB3

RFB4

10 k

20 k

0.8 V

VOUTSLAVE2 = 1.2 V

VOUTMASTER = 3.3 V

Slave regulator #1

Ratiometric tracking

Slave regulator #2

Coincident tracking

SYNCIN

SYNCOUT

from Master

CSS1

2.2 nF

CSS2

2.2 nF

SYNCIN

10 k

Figure 8-7. Tracking Implementation with Master, Ratiometric Slave, and Coincident Slave Rails

For coincident tracking, connect the SS/TRK input of the slave regulator to a resistor divider from the output

voltage of the master that is the same as the divider used on the FB pin of the slave. In other words, simply

select RTRK3 = RFB3 and RTRK4 = RFB4 as shown in Figure 8-7. As the master voltage rises, the slave voltage

rises identically (aside from the 80-mV offset from SS/TRK to FB when VFB is below 0.8 V). Eventually, the slave

voltage reaches its regulation voltage, at which point the internal reference takes over the regulation while the

SS/TRK input continues to 115 mV above FB, and no longer controls the output voltage.

In all cases, to ensure that the output voltage accuracy is not compromised by the SS/TRK voltage being too

close to the 0.8-V reference voltage, the final value of the SS/TRK voltage of the slave should be at least 100

mV above FB.

8.3.8 Voltage-Mode Control (COMP)

The LM5146 incorporates a voltage-mode control loop implementation with input voltage feedforward to

eliminate the input voltage dependence of the PWM modulator gain. This configuration allows the controller

to maintain stability throughout the entire input voltage operating range and provides optimal response to input

voltage transient disturbances. The constant gain provided by the controller greatly simplifies loop compensation

design because the loop characteristics remain constant as the input voltage changes, unlike a buck converter

without voltage feedforward. An increase in input voltage is matched by a concomitant increase in ramp voltage

amplitude to maintain constant modulator gain. The input voltage feedforward gain, kFF, is 15, equivalent to the

input voltage divided by the ramp amplitude, VIN/VRAMP. See Section 9.1.3 for more detail.

8.3.9 Gate Drivers (LO, HO)

The LM5146 gate driver impedances are low enough to perform effectively in high output current applications

where large die-size or paralleled MOSFETs with correspondingly large gate charge, QG, are used. Measured

at VVCC = 7.5 V, the low-side driver of the LM5146 has a low impedance pulldown path of 0.9 Ω to minimize

the effect of dv/dt induced turn-on, particularly with low gate-threshold voltage MOSFETs. Similarly, the high-side

LM5146

SNVSBV0A – JUNE 2021 – REVISED JUNE 2021

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