ACE25AA320GFMLTH datasheet(41/67 Pages) ACE

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ACE25AA320G

Serial NOR Flash Memory

3.0V Multi I/O with 4KB, 32KB & 64KB Sector/Block Erase

VER 1.2

Read Identification (RDID) (9FH)

The Read Identification (RDID) command allows the 8-bit manufacturer identification to be read, followed

by two bytes of device identification. The device identification indicates the memory type in the first byte,

and the memory capacity of the device in the second byte. Any Read Identification (RDID) command

while an Erase or Program cycle is in progress, is not decoded, and has no effect on the cycle that is in

progress. The Read identification (RDID) command should not be issued while the device is in Deep

Power-Down Mode.

The device is first selected by driving CS# to low. Then, the 8-bit command code for the command is

shifted in. This is followed by the 24-bit device identification, stored in the memory, being shifted out on

Serial Data Output, each bit being shifted out during the falling edge of Serial Clock. The command

sequence is shown in Figure25. The Read Identification (RDID) command is terminated by driving CS# to

high at any time during data output. When CS# is driven high, the device is put in the Standby Mode.

Once in the Standby Mode, the device waits to be selected, so that it can receive, decode and execute

commands.

Erase Security Registers (44H)

The ACE25AA320G provides four 256-byte Security Registers which only erased all at once but able to

program individually. These registers may be used by the system manufacturers to store security and

other important information separately from the main memory array.

The Erase Security Registers command is similar to Sector/Block Erase command. A Write Enable

(WREN) command must previously have been executed to set the Write Enable Latch (WEL) bit.

The Erase Security Registers command sequence: CS# goes low→sending Erase Security Registers

Command→CS# goes high. The command sequence is shown in Figure 26. CS# must be driven high

after the eighth bit of the command code has been latched in, otherwise the Erase Security Registers

command is not executed. As soon as CS# is driven high, the self-timed Erase Security Registers cycle

(whose duration is tSE) is initiated. While the Erase Security Registers cycle is in progress, the Status

Figure25. Read Identification ID Sequence Diagram

ACE25AA320GFMLTH Datasheet(PDF) 41 Page - ACE Technology Co., LTD.