ACE25AB400G

Serial NOR Flash Memory 4M bits 3.0V Dual I/O Serial Flash Memory with 4KB Uniform Sector

VER 1.1

18

Chip Erase (CE) (60/C7H)

The Chip Erase (CE) command is for erasing the all data of the chip. A Write Enable (WREN) command

must previously have been executed to set the Write Enable Latch (WEL) bit .The Chip Erase (CE)

command is entered by driving CS# Low, followed by the command code on Serial Data Input (SI). CS#

must be driven Low for the entire duration of the sequence.

The Chip Erase command sequence: CS# goes low→sending Chip Erase command →CS# goes high.

The command sequence is shown in Figure 13. CS# must be driven high after the eighth bit of the

command code has been latched in, otherwise the Chip Erase command is not executed. As soon as

CS# is driven high, the self- timed Chip Erase cycle (whose duration is tCE) is initiated. While the Chip

Erase cycle is in progress, the Status Register may be read to check the value of the Write In Progress

(WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed Chip Erase cycle, and is 0 when it is

completed. At some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is

reset. The Chip Erase (CE) command is executed if the Block Protect (BP1, BP0) bits are all 0. The Chip

Erase (CE) command is ignored if one or more sectors are protected. Note: Power disruption during

erase operation will cause incomplete erase, thus recommend performing a re-erase once power resume.

Deep Power-Down (DP) (B9H)

Executing the Deep Power-Down (DP) command support a way to put the device in the lowest

consumption mode (the Deep Power-Down Mode). It can also be used as an extra software protection

mechanism, while the device is not in active use. Driving CS# high deselects the device, and puts the

device in the Standby Mode (if there is no internal cycle currently in progress). But this mode is not the

Deep Power-Down Mode. The Deep Power-Down Mode can only be entered by executing the Deep

Power-Down (DP) command. The Release from Deep Power-Down and Read Device ID (RDI) command

also allows the Device ID of the device to be out- put on SO.

The Deep Power-Down Mode automatically stops at Power-Down, and the device always Power-Up in

the Standby Mode. The Deep Power-Down (DP) command is entered by driving CS# low, followed by the

command code on SI. CS# must be driven low for the entire duration of the sequence.

Figure13. Chip Erase Sequence Diagram