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ACE25AB400GFMLTH Datasheet(PDF) 9 Page - ACE Technology Co., LTD. |
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ACE25AB400GFMLTH Datasheet(HTML) 9 Page - ACE Technology Co., LTD. |
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9 / 37 page ![]() ACE25AB400G Serial NOR Flash Memory 4M bits 3.0V Dual I/O Serial Flash Memory with 4KB Uniform Sector VER 1.1 9 Write Enable (WREN) (06H) The Write Enable (WREN) command is for setting the Write Enable Latch (WEL) bit. The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Block Erase (BE), Chip Erase (CE) and Write Status Register (WRSR) command. The Write Enable (WREN) command sequence: CS# goes low→Sending the Write Enable command→CS# goes high. Write Enable for Volatile Status Register (50H) The non-volatile Status Register bits can also be written to as volatile bits. This gives more flexibility to change the system configuration and memory protection schemes quickly without waiting for the typical non- volatile bit write cycles or affecting the endurance of the Status Register non-volatile bits. The Write Enable for Volatile Status Register command must be issued prior to a Write Status Register command and any other commands can't be inserted between them. Otherwise, Write Enable for Volatile Status Register will be cleared. The Write Enable for Volatile Status Register command will not set the Write Enable Latch bit, it is only valid for the Write Status Register command to change the volatile Status Register bit values. Figure1. Write Enable Sequence Diagram Figure2. Write Enable for Volatile Status Register Sequence Diagram |
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