68HC705JB4 datasheet(129/134 Pages) FREESCALE

129 / 134 page

February 24, 1999

GENERAL RELEASE SPECIFICATION

MC68HC05JB4

MOTOROLA

REV 2

A-3

The user code must be a one-to-one correspondence with the internal EPROM

addresses.

A.5

EPROM PROGRAMMING

Programming the on-chip EPROM is achieved by using the Program Control Reg-

ister located at address $3E.

Please contact Motorola for programming board availability.

A.5.1 EPROM Program Control Register (PCR)

This register is provided for programming the on-chip EPROM in the

MC68HC705JB4.

MORON – Mask Option Register ON

0 =

Disable programming to Mask Option Register ($007F)

1 =

Enable programming to Mask Option Register ($007F)

ELAT – EPROM LATch control

0 =

EPROM address and data bus conﬁgured for normal reads

1 =

EPROM address and data bus conﬁgured for programming (writes

to EPROM cause address and data to be latched). EPROM is in

programming mode and cannot be read if ELAT is 1. This bit should

not be set when no programming voltage is applied to the Vpp pin.

PGM – EPROM ProGraM command

0 =

Programming power is switched OFF from EPROM array.

1 =

Programming power is switched ON to EPROM array. If ELAT

≠ 1,

then PGM = 0.

A.5.2 Programming Sequence

The EPROM programming sequence is:

Set the ELAT bit

Write the data to the address to be programmed

Set the PGM bit

Delay for a time tPGMR

Clear the PGM bit

Clear the ELAT bit

The last two steps must be performed with separate CPU writes.

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

PCR

RESERVED

MORON

ELAT

PGM

$003E

reset:

00000000

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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