21

AT25DN011

DS-25DN011–038H–8/2021

Note:

1. Only bits 4 and 3 of Status Register Byte 2 will be modified when using the Write Status



Register Byte 2 command

2. R/W = Readable and Writeable



R = Readable only.

Figure 11-1. Read Status Register



11.2 Write Status Register

The Write Status Register command is used to modify the BPL bit and the BP0 bit of the Status Register. Before the

Write Status Register command can be issued, the Write Enable command must have been previously issued to set the

WEL bit in the Status Register to a logical “1”.

To issue the Write Status Register command, the CS pin must first be asserted and the opcode of 01h must be clocked

into the device followed by one byte of data. The one byte of data consists of the BPL bit value, four don’t care bits, the

BP0 bit value, and two additional don’t care bits (see Table 11-3). Any additional data bytes that are sent to the device

will be ignored. When the CS pin is deasserted, the BPL bit and the BP0 bit in the Status Register will be modified, and

the WEL bit in the Status Register will be reset back to a logical “0”. The value of BP0 and the state of the BPL bit and the

WP pin before the Write Status Register command was executed (the prior state of the BPL bit and the state of the WP

pin when the CS pin is deasserted) will determine whether or not software protection will be changed. Please refer to

Section 9.4, “Protected States and the Write Protect Pin” on page 15 for more details.

Table 11-2. Status Register Format – Byte 2

Name

Description

7

RES

Reserved for future use

R

0

Reserved for future use

6

RES

Reserved for future use

R

0

Reserved for future use

5

RES

Reserved for future use

R

0

Reserved for future use

4

RSTE

Reset Enabled

R/W

0

Reset command is disabled (default)

1

Reset command is enabled

3

RES

Reserved for future use

R

0

Reserved for future use

2

RES

Reserved for future use

R

0

Reserved for future use

1

RES

Reserved for future use

R

0

Reserved for future use

0

RDY/BSY

Ready/Busy Status

R

0

Device is ready

1

Device is busy with an internal operation

SCK

CS

SI

SO

MSB

23

1

0

00000101

67

5

410 11

9

812

21 22

17

20

19

18

15 16

13 14

23 24

OPCODE

MSB

MSB

DDDDDD

DD

D

D

MSB

DDDDDD

D

D

STATUS REGISTER BYTE1

STATUS REGISTER BYTE2

HIGH-IMPEDANCE