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MPC866P Datasheet(PDF) 35 Page - NXP Semiconductors |
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MPC866P Datasheet(HTML) 35 Page - NXP Semiconductors |
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35 / 96 page  MPC866/MPC859 Hardware Specifications, Rev. 2 Freescale Semiconductor 35 Bus Signal Timing Figure 20 shows the timing for the asynchronous asserted UPWAIT signal controlled by the UPM. Figure 20. Asynchronous UPWAIT Asserted Detection in UPM Handled Cycles Timing Figure 21 shows the timing for the asynchronous negated UPWAIT signal controlled by the UPM. Figure 21. Asynchronous UPWAIT Negated Detection in UPM Handled Cycles Timing CLKOUT CSx UPWAIT GPL_A[0:5], GPL_B[0:5] BS_A[0:3], BS_B[0:3] B37 B38 CLKOUT CSx UPWAIT GPL_A[0:5], GPL_B[0:5] BS_A[0:3], BS_B[0:3] B37 B38 |
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