PIN

NAME

FUNCTION

1, 5, 11, 15

N.C.

Not Connected

2, 3, 4

IN

Switch Input. Bypass IN to ground with a 1µF ceramic capacitor for ±15kV Human Body Model

ESD protection on IN. In applications in which an external pFET is used, a 4.7µF capacitor should

be placed at the drain of the pFET and a reduced capacitor of 10nF to 100nF should be placed at

IN. The maximum slew rate allowed at IN is 30V/µs. IN serves as the under/overvoltage sensed

input when preprogrammed UVLO/OVLO is used.

6

GP

Gate Driver Output for External pFET

7

SETI

Overload Current-Limit Adjust. Connect a resistor from SETI to GND to program the overcurrent

limit. SETI must be connected to a resistor. If SETI is connected to GND during startup, then the

switch does not turn on. Do not connect more than 30pF to SETI.

8

FLAG

reached, or SETI is connected to GND.

9

OVLO

Externally-Programmable Overvoltage Lockout Threshold. Connect OVLO to GND to use the

default internal OVLO threshold. Connect OVLO to an external resistor-divider to define a

threshold externally and override the preset internal OVLO threshold.

10

UVLO

Externally-Programmable Undervoltage Lockout Threshold. Connect UVLO to GND to use the

default internal UVLO threshold. Connect UVLO to an external resistor-divider to define a threshold

externally and override the preset internal UVLO threshold.

12, 13, 14

OUT

Switch Output. Bypass OUT to GND with a 4.7µF ceramic capacitor placed as close to the device

as possible.

16

RIPEN

Reverse-Current Protection Enable. Internally pulled up. Connect RIPEN to GND with 10kW

resistor or lower to disable the reverse-current flow protection.

17

HVEN

60V Capable Active-Low Enable Input. See Table 1.

18

CLTS2

Current-Limit Type Select 2. See Table 2.

19

CLTS1

Current-Limit Type Select 1. See Table 2.

20

EN

Active-High Enable Input. See Table 1.

—

GND/EP

Ground/Exposed Pad. Connect to a large copper ground plane to maximize thermal performance.

MAX14721/

MAX14722/

MAX14723

High-Accuracy, Adjustable Power Limiter

www.maximintegrated.com

Maxim Integrated │ 10

Pin Description

Pin Configurations

MAX14721–

MAX14723

TQFN

(5mm x 5mm)

TOP VIEW

GND/EP

+

CLTS2

CLTS1

EN

OVLO

FLAG

SETI

GP

HVEN

UVLO

RIPEN

10

9

8

7

6

11

12

13

14

15

16

17

18

19

20

5

4

3

2

1