DS2152 datasheet(22/97 Pages) MAXIM

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DS2152

22 of 97

TCR2: TRANSMIT CONTROL REGISTER 2 (Address = 36 Hex)

(MSB)

(LSB)

TEST1

TEST0

TZBTSI

TSDW

TSM

TSIO

TD4YM

TB7ZS

SYMBOL

POSITION

NAME AND DESCRIPTION

TEST1

TCR2.7

Test Mode Bit 1 for Output Pins. See Table 4-1.

TEST0

TCR2.6

Test Mode Bit 0 for Output Pins. See Table 4-1.

TZBTSI

TCR2.5

Transmit Side ZBTSI Enable.

0 = ZBTSI disabled

1 = ZBTSI enabled

TSDW

TCR2.4

TSYNC Double-Wide. (Note: this bit must be set to 0 when

TCR2.3 = 1 or when TCR2.2 = 0.)

0 = do not pulse double-wide in signaling frames

1 = do pulse double-wide in signaling frames

TSM

TCR2.3

TSYNC Mode Select.

0 = frame mode (see the timing diagrams in Section 16)

1 = multiframe mode (see the timing diagrams in Section 16)

TSIO

TCR2.2

TSYNC I/O Select.

0 = TSYNC is an input

1 = TSYNC is an output

TD4YM

TCR2.1

Transmit Side D4 Yellow Alarm Select.

0 = 0s in bit 2 of all channels

1 = a 1 in the S-bit position of frame 12

TB7ZS

TCR2.0

Transmit Side Bit 7 Zero Suppression Enable.

0 = no stuffing occurs

1 = Bit 7 force to a 1 in channels with all 0s

Table 4-1. Output Pin Test Modes

TEST 1

TEST 0

EFFECT ON OUTPUT PINS

Operate normally

Force all output pins tri-state (including all I/O pins and parallel port pins)

Force all output pins low (including all I/O pins except parallel port pins)

Force all output pins high (including all I/O pins except parallel port pins)

DS2152 Datasheet(PDF) 22 Page - Maxim Integrated Products

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