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Data Sheet

ADM1272

Rev. B | Page 21 of 57

RSENSE

SENSE–

GND

GATE

VCC

SENSE+

ADM1272

OVER-

CURRENT

REFERENCE

×40

–

Figure 34. Hot Swap Current Sense Amplifier

The SENSE± inputs can be connected to multiple parallel

sense resistors. The way the sense points of these resistors are

combined has a significant effect on the accuracy of the voltage

drop detected by the ADM1272.

To achieve better accuracy, averaging resistors can be used to sum

the voltages from the nodes of each sense resistor, as shown in

Figure 35. A typical value for the averaging resistors is 10 Ω,

enough to be significantly greater than the trace resistance. The

input current to each sense pin is matched to within 5 μA. This

matching ensures that the same offset is observed by both sense

inputs, reducing differential errors.

SENSE–

GND

GATE

VCC

SENSE+

BIAS

CURRENT

VIN

Figure 35. Connection of Multiple Sense Resistors to the SENSE± Pins

CURRENT-LIMIT MODES

The ADM1272 features dual current limits, one for startup

(ISTART) and one for normal operation (ISET). At startup, the

ISTART pin determines the current limit used during power-up.

This dual current limit allows users to program an independent

current limit at startup, specific to the conditions of the start-

up profile and expectations. After startup is complete, the

system switches to the main current limit determined by ISET.

The conditions that must be satisfied for this switch to occur

are as follows:



The system is not in current limit.



(VOUT − VIN) < 2 V.



The gate voltage is fully enhanced (VGS > 10 V).

The system remains at the normal current limit (ISET) unless there

is an interruption triggered by an OV, UV, or manual shutdown

(enable, restart, or PMBus command) and this interruption

results in VDS > 2 V and inactive PWRGD. If this interruption

occurs, the system resets to ISTART and assumes a full system

restart. For this reset to happen, a shutdown must be signaled

with enough time to allow the gate to disable the FETs and the

output to discharge. However, the system remains in ISET

current limit following an OC fault to allow a recovery attempt.

If the system cannot recover, a latchoff occurs and ISTART

assumes control at the next startup.

SETTING THE CURRENT LIMITS (ISET/ISTART)

The current limit is typically determined by selecting a sense

resistor to match the current sense voltage limit on the controller

for the desired load current. However, as currents become larger,

the sense resistor requirements become smaller, and resolution

can be difficult to achieve when selecting the appropriate sense

resistor or combination thereof. The ADM1272 provides

adjustable current sense voltage limits to manage this issue. The

device allows the user to program the required current sense

voltage limits independently up to 30 mV. The recommended

range is 2.5 mV to 30 mV, although tolerances and errors increase

as VSENSECL decreases.

In conjunction with the sense resistor, the current-limit

reference voltage determines the load current level to which the

ADM1272 limits the current during an overcurrent event. This

reference voltage is compared to the amplified current sense

voltage to determine whether the limit is reached.

The active current-limit reference voltage input to the internal

comparator is clamped to a minimum level of 100 mV (that is,

VSENSECL = 2.5 mV) to prevent current limits being set too low,

which may result in zero current flow across all conditions.

The current limit set by the ISET/ISTART pins is the current at

which the ADM1272 tries to regulate when the load requires

more current. This current limit, defined by the reference to the

current control loop, is the regulation current limit or IREG

(VSENSECL at the sense voltage).

Another current-limit threshold just below IREG that alerts the

ADM1272 when the current limit is reached and is active, is the

circuit breaker current limit or ICB (VCB at sense voltage). VCB

can be expressed at the sense pins (in mV) as follows:

VCB = VSENSECL − VCBOS

where VCBOS is the circuit breaker offset and is listed in Table 1

as 1.1 mV (typical).

ISTART

The ISTART pin sets the start-up current limit in start-up mode

using a divider from the VCAP pin, or if pulled up to VCAP

with a 10 kΩ resistor, an internal 1 V threshold is used (25 mV).

The VCAP pin has a 2.7 V internal regulated voltage that can

be used as a reference to set a voltage at the ISTART pin.

Assuming that VISTART equals the voltage on the ISTART pin,

size the resistor divider to set the ISTART voltage as follows:

VISTART = VSENSECL × 40

where VSENSECL is the current sense voltage limit.

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