LTC2949 datasheet(21/80 Pages) AD

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LTC2949

Rev A

For more information www.analog.com

OPERATION

Table 3. Timebase Settings for Common Frequencies

fREF [MHz] PRE 2PRE fREF_1[MHz] DIV

TIME BASE

CONTROL [7:0]

1111 0000

1.5

0.75

1011 0001

1111 0010

0.625

1001 1100

0.625

1001 1101

0.781

1011 1101

Int.

XXXX X111

OVERCURRENT COMPARATORS

The LTC2949 features two fast differential over-current

comparators with rail to rail input common mode and

programmable threshold followed by configurable filters

to suppress input glitches. Overcurrent comparator 1

(OCC1)isconnectedtopinsI1PandI1Mwhileovercurrent

comparator 2 (OCC2) supervises the differential voltage

between I2P and I2M. Both overcurrent comparators can

individually be configured to detect either only positive or

only negative overcurrents or overcurrents independent

of their polarity. When at least one of the overcurrent

comparators is enabled, GPIO5 turns into a heartbeat

signal toggling at 400kHz while currents are within the

desired range and staying low if any current exceeds its

programmed limit.

The overcurrent comparator 1 (OCC1) between I1P and

I1M is controlled by the control register OCC1CTRL

while overcurrent comparator 2 (OCC2) is controlled by

its control register at OCC2CTRL, both on page 0 of the

as shown in Table 4.

Table 4. Overcurrent Comparator Control Registers

BIT #

NAME

FUNCTION

OCCxEN

Enable OCC

OCCxDAC0

Threshold DAC[0]

OCCxDAC1

Threshold DAC[1]

OCCxDAC2

Threshold DAC[2]

OCCxDGLT0

Deglitch [0]

OCCxDGLT1

Deglitch [1]

OCCxPOL0

Polarity [0]

OCCxPOL1

Polarity [1]

The overcurrent comparators are enabled by setting the

respective OCCxEN to 1.

Bits OCCxPOLx control the polarity sensitivity of the

comparator as in Table 5.

Table 5. OCC Polarity Configuration

OCCxPOL1

OCCxPOL0

POLARITY

Both Polarities

Positive Currents

Negative Currents

The thresholds of the overcurrent comparators can be

programmed individually by means of the OCCxDACx bits

between 0 and 310mV.

Table 6. OCC Thresholds

OCCxDAC2

OCCxDAC1

OCCxDAC0

Threshold

[mV]

103

155

207

310

Similarly,thedurationofathresholdexceedingnotreported

by the comparator (Deglitch Time) can be programmed by

the bits OCCxDGLTx between 20µs to 1.28ms.

Table 7. OCC Deglitch Time

OCCxDGLT1

OCCxDGLT0

DEGLITCH TIME [µs]

320

1280

Overcurrents are reported by setting OCC1 and OCC2 of

VCC and OCC Status Register (STATVCC) and by stop-

ping the heartbeat signal on GPIO5. While the update of

the output register can take up to 100ms, the heartbeat

is stopped within 15µs after an overcurrent exceeded the

programmeddeglitchtime.Onceanovercurrentoccurred,

the result bits in the register remain set until they are read

by the host and subsequently cleared.

For diagnostic purposes, the overcurrent comparators

have a self-test built in using test input signals IPT and

IMT, see the Safety Manual for more information.

LTC2949 Datasheet(PDF) 21 Page - Analog Devices

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