LTC2949 datasheet(24/80 Pages) AD

24 / 80 page

LTC2949

Rev A

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SERIAL INTERFACES

circuit operates. A 2V reference drives the IBIAS pin. Ex-

ternal resistors RB1 and RB2 create the reference current

IB. This current sets the drive strength of the transmitter.

RB1 and RB2 also form a voltage divider of the 2V refer-

ence at the ICMP pin. This sets the threshold voltage of

the receiver circuit.

Waking Up the isoSPI Port

The isoSPI port has 3 modes of operation, IDLE, READY

and ACTIVE as described in the section isoSPI State De-

scription. In IDLE, the WAKEUP circuit monitors activity

on pins IP and IM. Differential activity on IP-IM wakes up

the isoSPI interface. The isoSPI port will return to the low

power IDLE state if there is no activity on IP/IM for a time

of tIDLE. The LTC2949 will be ready to communicate when

the core is not in SLEEP and the isoSPI state changes

to READY (within tREADY after wakeup) as illustrated in

Figure 3. Common mode signals will not wake up the

serial interface. The interface is designed to wake up

after receiving a large signal single-ended pulse, or a

low-amplitude symmetric pulse. The differential signal

|IP – IM|, must be at least VWAKE = 200mV for a minimum

duration of tDWELL = 240ns to qualify as a wake up signal

that powers up the serial interface.

"Long -1" or "Long +1" pulses (= drive CSB low, high)

generatedbyLTC6820andcompatibleisoSPIdevices(e.g.

LTC68xx Cell Monitors) will always meet this requirement.

See following chapters for isoSPI pulse details.

Selecting Bias Resistors

The adjustable signal amplitude allows the system to trade

power consumption for communication robustness, and

the adjustable comparator threshold allows the system to

accountforsignallosses.TheisoSPItransmitterdrivecur-

rent and comparator voltage threshold are set by a resistor

divider (RBIAS = RB1 + RB2) between the IBIAS and DGND.

The divided voltage (VICMP) is connected to the ICMP pin

which sets the comparator threshold (VICMP) to 1/2 of this

voltage. When the isoSPI interface is enabled (not IDLE)

IBIAS is held at 2V, causing a current IB to flow out of the

IBIAS pin. The IP and IM pin drive currents are 20 • IB.

As an example, if divider resistor RB1 is 2.8k and resistor

RB2 is 1.21k (so that RBIAS = 4k), then:

IB =

RB1+RB2

= 0.5mA

IDRV =IIP =IIM =20•IB =10mA

VICMP =2V •

RB2

RB1+RB2

=IB •RB2 =603mV

VTCMP =0.5• VICMP =302mV

In this example, the pulse drive current IDRV will be 10mA,

and the receiver comparators will detect pulses with IP-IM

amplitudes greater than ±302mV. If the isolation barrier

uses 1:1 transformers connected by a twisted pair and

terminated with 100Ω resistors on each end, then the

transmitted differential signal amplitude (±) will be:

VA =IDRV •

= 0.5V

(This result ignores transformer and cable losses, which

may reduce the amplitude).

isoSPI Pulse Detail

The transmitter can output three voltage levels: +VA, 0V,

and–VA.ApositiveoutputresultsfromIPsourcingcurrent

and IM sinking current across load resistor RM. A nega-

tive voltage is developed by IP sinking and IM sourcing.

When both outputs are off, the load resistance forces

the differential output to 0V. To eliminate the DC signal

componentandenhancereliability,theisoSPIusesbipolar

pulses of two different pulse length. This allows for four

types of pulses to be transmitted, as shown in Table 8. A

+1 pulse will be transmitted as a positive pulse followed

by a negative pulse. A –1 pulse will be transmitted as a

negative pulse followed by a positive pulse. The duration

of each pulse is defined as t1/2PW, since each is half of the

required symmetric pair. (The total isoSPI pulse duration

is 2 • t1/2PW).

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