P87LPC779 datasheet(52/74 Pages) PHILIPS

52 / 74 page

Philips Semiconductors

P87LPC779

CMOS single-chip 8-bit microcontroller

Product data

Rev. 02 — 03 May 2004

52 of 74

9397 750 13213

reset and the unit goes back to looking for another 1-to-0 transition. If the start bit

proves valid, it is shifted into the input shift register, and reception of the rest of the

frame will proceed.

As data bits come in from the right, 1s shift out to the left. When the start bit arrives at

the leftmost position in the shift register (which in Modes 2 and 3 is a 9-bit register), it

ﬂags the RX Control block to do one last shift, load SBUF and RB8, and set RI.

The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the

following conditions are met at the time the ﬁnal shift pulse is generated. 1. RI = 0,

and 2. Either SM2 = 0, or the received 9th data bit = 1.

If either of these conditions is not met, the received frame is irretrievably lost, and RI

is not set. If both conditions are met, the received 9th data bit goes into RB8, and the

ﬁrst 8 data bits go into SBUF. One bit time later, whether the above conditions were

met or not, the unit goes back to looking for a 1-to-0 transition at the RxD input.

8.15.11

Multiprocessor communications

UART modes 2 and 3 have a special provision for multiprocessor communications. In

these modes, 9 data bits are received or transmitted. When data is received, the 9th

bit is stored in RB8. The UART can be programmed such that when the stop bit is

received, the serial port interrupt will be activated only if RB8 = 1. This feature is

enabled by setting bit SM2 in SCON. One way to use this feature in multiprocessor

systems is as follows:

When the master processor wants to transmit a block of data to one of several slaves,

it ﬁrst sends out an address byte which identiﬁes the target slave. An address byte

differs from a data byte in that the 9th bit is ‘1’ in an address byte and ‘0’ in a data

byte. With SM2 = 1, no slave will be interrupted by a data byte. An address byte,

however, will interrupt all slaves, so that each slave can examine the received byte

and see if it is being addressed. The addressed slave will clear its SM2 bit and

prepare to receive the data bytes that follow. The slaves that weren’t being addressed

leave their SM2 bits set and go on about their business, ignoring the subsequent data

bytes.

SM2 has no effect in Mode 0, and in Mode 1 can be used to check the validity of the

stop bit, although this is better done with the Framing Error ﬂag. In a Mode 1

reception, if SM2 = 1, the receive interrupt will not be activated unless a valid stop bit

is received.

8.15.12

Automatic address recognition

Automatic Address Recognition is a feature which allows the UART to recognize

certain addresses in the serial bit stream by using hardware to make the

comparisons. This feature saves a great deal of software overhead by eliminating the

need for the software to examine every serial address which passes by the serial

port. This feature is enabled by setting the SM2 bit in SCON. In the 9 bit UART

modes, mode 2 and mode 3, the Receive Interrupt ﬂag (RI) will be automatically set

when the received byte contains either the ‘Given’ address or the ‘Broadcast’

address. The 9 bit mode requires that the 9th information bit is a ‘1’ to indicate that

the received information is an address and not data.

P87LPC779 Datasheet(PDF) 52 Page - NXP Semiconductors

P87LPC779 Datasheet(HTML) 52 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Datasheet Download

Link URL