SH7041A datasheet(93/923 Pages) RENESAS

Part #	SH7041A

Description	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Table 2.8

Addressing Modes and Effective Addresses (cont)

Addressing

Mode

Instruction

Format

Effective Addresses Calculation

Equation

PC relative

addressing

disp:8

The effective address is the PC value sign-extended

with an 8-bit displacement (disp), doubled, and

added to the PC value.

disp

(sign-extended)

PC + disp

× 2

PC + disp

× 2

disp:12

The effective address is the PC value sign-extended

with a 12-bit displacement (disp), doubled, and

added to the PC value.

disp

(sign-extended)

PC + disp

× 2

PC + disp

× 2

The effective address is the register PC value

plus Rn.

PC + Rn

Immediate

addressing

#imm:8

The 8-bit immediate data (imm) for the TST, AND,

OR, and XOR instructions are zero-extended.

—

#imm:8

The 8-bit immediate data (imm) for the MOV, ADD,

and CMP/EQ instructions are sign-extended.

—

#imm:8

The 8-bit immediate data (imm) for the TRAPA

instruction is zero-extended and is quadrupled.

—

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