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LTC4366 Datasheet(PDF) 18 Page - Analog Devices

Part # LTC4366
Description  140V High Efficiency Switching Surge Stopper
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4366 Datasheet(HTML) 18 Page - Analog Devices

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LTC7862
18
Rev 0
For more information www.analog.com
APPLICATIONS INFORMATION
Power MOSFET Selection
Two external power MOSFETs must be selected for the
LTC7862 controller: one N-channel MOSFET for the top
(main) switch, and one N-channel MOSFET for the bottom
(synchronous) switch.
The peak-to-peak drive levels are set by the DRVCC volt-
age. This voltage can be 6V or 9V depending on configu-
ration of the DRVUV pin. Therefore, both logic-level and
standard-level threshold MOSFETs can be used in most
applications depending on the programmed DRVCC volt-
age. Pay close attention to the BVDSS specification for the
MOSFETs as well.
Selection criteria for the power MOSFET for normal pass-
through operation include the on-resistance RDS(ON),
input voltage and maximum output current.
The MOSFET power dissipation at maximum output cur-
rent are given by:
PMAIN = (IOUT(MAX))2 (1+ )RDS(ON)
PSYNC = 0 (Synchronous FET is OFF during normal pass-
through operation)
where  is the temperature dependency of RDS(ON).
The term (1 + ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs temperature curve, but
 = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
Selection criteria for the power MOSFETs during timer-
enabled switching operation include the on-resistance
RDS(ON), Miller capacitance CMILLER, input voltage and
maximum output current. Miller capacitance, CMILLER, can
be approximated from the gate charge curve usually pro-
vided on the MOSFET manufacturers’ data sheet. CMILLER
is equal to the increase in gate charge along the horizontal
axis while the curve is approximately flat divided by the
specified change in VDS. This result is then multiplied
by the ratio of the application applied VDS to the gate
charge curve specified VDS. When the IC is switching in
continuous mode the duty cycles for the top and bottom
MOSFETs are given by:
MAIN SWITCH DUTY CYCLE =
VOUT
VIN
SYNCHRONOUS SWITCH DUTY CYCLE
=
VIN − VOUT
VIN
The MOSFET power dissipations at maximum output cur-
rent are given by:
PMAIN =
VOUT
VIN
IOUT(MAX)
(
)2 1+δ
(
)RDS(ON) +
(VIN)2
IOUT(MAX)
2
⎛
⎝⎜
⎞
⎠⎟
(RDR)(CMILLER)•
1
VDRVCC − VTHMIN
+
1
VTHMIN
⎡
⎣
⎢
⎤
⎦
⎥(f)
PSYNC =
VIN − VOUT
VIN
IOUT(MAX)
(
)2 1+δ
(
)RDS(ON)
where δ is the temperature dependency of RDS(ON) and
RDR (approximately 2Ω) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. VTHMIN is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I2R losses while the main N-channel
equations include an additional term for transition losses,
which are highest at high input voltages. For VIN < 20V
the high current efficiency generally improves with larger
MOSFETs, while for VIN > 20V the transition losses rap-
idly increase to the point that the use of a higher RDS(ON)
device with lower CMILLER actually provides higher effi-
ciency. The synchronous MOSFET losses are greatest at
high input voltage when the top switch duty factor is low
or during a short-circuit when the synchronous switch is
on close to 100% of the period.
The MOSFET’s temperature rise due to power dissipation
must be considered. Refer to Thermal Considerations sec-
tion for more details.



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