 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AWR2944 Datasheet(PDF) 69 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
AWR2944 Datasheet(HTML) 69 Page - Texas Instruments |
|
|
69 / 93 page  9 Detailed Description 9.1 Overview The AWR294x device includes the entire Millimeter Wave blocks, and analog baseband signal chain, for three or four transmitters and four receivers, as well as a customer-programmable MCU and DSP. This device is applicable as a radar-on-a-chip in use-cases with modest requirements for memory, processing capacity, and application code size. These could be cost-sensitive automotive applications that are evolving from 24 GHz narrowband implementation and some emerging, ultra-short-range radar applications. To support additional scalability, the device can also be paired with an external host MCU, to provide additional control and processing platform so as to address more complex applications. To interface to external host MCU, the device provides SPI, CAN-FD and I2C for host control. 9.2 Functional Block Diagram Figure 9-1 represents the functional block diagram for the device. Hardware Security Module (B) IF ADC Digital Front-end (Decimation Filter Chain) LNA IF ADC LNA IF ADC LNA IF ADC LNA PA û- PA û- Synth (20 GHz) Ramp Generator x4 Osc. VMON Temp ARM Cortex-R5F (Lock Step) @ 300 MHz L2 RAM 960KB (A) Prog Cache 16KB Data Cache 16KB QSPI SPI SPI / I2C Debug UARTs DMA Test/ Debug ADC Buffer Aurora LVDS RF/Analog Sub-System Radio Processor Sub-System (TI Programmed) Main Sub-System (Customer Programmed) Serial Flash Interface Optional External MCU Interface PMIC Control Primary Communication Interfaces (Automotive) JTAG for Debug/ Development High-Speed ADC Output Interface (for Recording) 9 CAN-FD DSP Sub-System (Customer Programmed) Mailbox CSI2 RX High-Speed Interface to enable playback of the captured data C66x DSP Core @ 360 MHz L1P (32KB) L1D (32KB) L2 (384KB) Radar Data Memory (A) AWR2943 - 2.0MB / AWR2944 - 2.5MB PA û- L1 Data RAM 128KB (A) For Debug Ethernet 100Mbps Alternate Data Communication Interface PA û- Radio (BIST) Processor (For RF Calibration & Self-Test ± TI Programmed) Prog RAM & ROM Data RAM GPADC GPADC DMA CRC Radar Hardware Accelerator (FFT, Log mag, and others) A. Configurable memory can be switched from Radar Data memory to the Main R5F program and Data RAMs per application usecase needs. B. This feature is only available in select part variants as indicated by the Device Type identifier in the Section 3, Device Information table. Figure 9-1. Functional Block Diagram www.ti.com AWR2944 SWRS273 – NOVEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 69 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
