56F8335 datasheet(37/160 Pages) FREESCALE

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Interrupt Vector Table

56F8335 Technical Data, Rev. 1

Freescale Semiconductor

Preliminary

Note: PWMA, FlexCAN, Quadrature Decoder 1, and Quad Timers B and D are NOT available on the

56F8135 device.

Table 4-5 Interrupt Vector Table Contents1

Peripheral

Vector

Number

Priority

Level

Vector Base

Address +

Interrupt Function

Reserved for Reset Overlay2

Reserved for COP Reset Overlay2

core

P:$04

Illegal Instruction

core

P:$06

SW Interrupt 3

core

P:$08

HW Stack Overflow

core

P:$0A

Misaligned Long Word Access

core

1-3

P:$0C

OnCE Step Counter

core

1-3

P:$0E

OnCE Breakpoint Unit 0

Reserved

core

1-3

P:$12

OnCE Trace Buffer

core

1-3

P:$14

OnCE Transmit Register Empty

core

1-3

P:$16

OnCE Receive Register Full

Reserved

core

P:$1C

SW Interrupt 2

core

P:$1E

SW Interrupt 1

core

P:$20

SW Interrupt 0

core

0-2

P:$22

IRQA

core

0-2

P:$24

IRQB

Reserved

LVI

0-2

P:$28

Low Voltage Detector (power sense)

PLL

0-2

P:$2A

PLL

0-2

P:$2C

FM Access Error Interrupt

0-2

P:$2E

FM Command Complete

0-2

P:$30

FM Command, data and address Buffers Empty

Reserved

FLEXCAN

0-2

P:$34

FLEXCAN Bus Off

FLEXCAN

0-2

P:$36

FLEXCAN Error

FLEXCAN

0-2

P:$38

FLEXCAN Wake Up

FLEXCAN

0-2

P:$3A

FLEXCAN Message Buffer Interrupt

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