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LTC4449 Datasheet(PDF) 10 Page - Analog Devices

Part # LTC4449
Description  150V Dual High-Side MOSFET Gate Driver
PDF  14 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4449 Datasheet(HTML) 10 Page - Analog Devices

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LTC7067
10
Rev. 0
For more information www.analog.com
OPERATION
Since the power MOSFETs generally account for the
majority of the power loss in a converter, it is important
to turn them on and off quickly, thereby minimizing the
transition time and power loss. The LTC7067’s typical
1.5Ω pull-up resistance and 0.8Ω pull-down resistance
are equivalent to 3A peak pull-up current and 6A peak
pull down current at a 10V driver supply. Both G2 and G1
can produce a rapid turn-on transition for the MOSFETs
with capability of driving a 3nF load with 18ns rise time.
Protection Circuitry
When using the LTC7067, care must be taken not to
exceed any of the Absolute Maximum Ratings. As an
added safeguard, the LTC7067 incorporates an over-
temperature shutdown feature. If the junction tempera-
ture reaches approximately 180°C, the LTC7067 will
enter thermal shutdown mode and G2 will be pulled to
G2RTN; G1 will be pulled to G1RTN. Normal operation
will resume when the junction temperature cools to be
less than 165°C. The overtemperature level is not pro-
duction tested. The LTC7067 is guaranteed to operate at
temperatures below 150°C.
The LTC7067 contains both undervoltage and overvoltage
lockout detectors that monitor the VCC supply. When VCC
falls below 4.3V or rises above 14.6V, the output pins G2
and G1 are pulled to G2RTN and G1RTN, respectively.
This turns off both the external MOSFETs. When VCC has
adequate supply voltage but less than the overvoltage
threshold, normal operation will resume.
Additional undervoltage lockout circuitry is included in
each floating driver supply. The G2 will be pulled down to
G2RTN when the floating voltage from G2VCC to G2RTN
falls below 3.3V. Similarly, the G1 will be pulled down to
G1RTN when the floating voltage from G1VCC to G1RTN
is less than 3.3V.
The normal operation and undervoltage/overvoltage logic
table is shown in Table 1.
Table 1. Normal Operation and Undervoltage/Overvoltage Logic
G1IN G2IN
VCC
UVLO or
OVLO
(G1VCC–
G1RTN)
UVLO
(G2VCC–
G2RTN)
UVLO
THERMAL
SHUTDOWN G1 G2 FLTB
X
X
X
X
X
Yes
L
L
L
X
X
Yes
X
X
No
L
L
L
X
H
No
Yes
N
No
L H
L
H
X
No
No
Yes
No
H L
L
L
H
No
No
No
No
L H
H
H
L
No
No
No
No
H L
H
H
H
No
No
No
No
H H
H
L
L
No
No
No
No
L
L
H
Note: “X” means “Don’t Care”, “H” means “High”, and “L” means “Low”.
FAULT FLAG
FLT pin is connected to the open-drain of an internal
N-channel MOSFET. It needs a pull-up resistor (e.g. 51k)
tied to a supply such as VCC or any other bias voltage up
to 15V. The FLT pin is pulled low to SGND immediately if
any of these conditions are met:
a. The VCC is below its UVLO threshold or above its OVLO
threshold.
b. (G2VCC – G2RTN) is below its UVLO threshold.
c. (G1VCC – G1RTN) is below its UVLO threshold.
d. The junction temperature reaches approximately
180°C.
When all the faults are cleared, FLT pin is pulled up by the
external resistor after a built-in 100µs delay.



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