LTC4449 datasheet(11/14 Pages) AD

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LTC7067

Rev. 0

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Bootstrapped Supply (G2VCC – G2RTN, G1VCC – G1RTN)

Either or both of the G2VCC – G2RTN and G1VCC – G1RTN

supplies can be bootstrapped supplies. An external boost

capacitor, CB, connected between G2VCC and G2RTN, or

between G1VCC and G1RTN, supplies the gate driver volt-

age for its respective MOSFET driver. When the external

MOSFET is turned on, the driver places the CB voltage

across the gate-source of the MOSFET. This enhances the

MOSFET and turns it on.

The charge to turn on the external MOSFET is referred to

gate charge, QG, and is typically specified in the external

MOSFET data sheet. The boost capacitor, CB, needs to

have at least 10 times the gate charge to turn on the

external MOSFET fully. Gate charge can range from 5nC

to hundreds of nC and is influenced by the gate drive level

and type of external MOSFET used. For most applica-

tions, a capacitor value of 0.1μF for CB will be sufficient.

However, if multiple MOSFETs are paralleled and drove

by the LTC7067, CB needs to be increased correspond-

ingly and the following relationship for the CB should be

maintained:

CB >

•ExternalMOSFET QG

An external supply, typically VCC connected through a

Schottky diode, is required to keep the CB charged. The

LTC7067 does not charge the CB and always discharges

the CB. When the G2/G1 is high, the total current from

G2VCC/G1VCC to G2RTN/G1RTN and SGND is typically

146µA; when the G2/G1 is low, the total current from

G2VCC/G1VCC is typically 9µA.

POWER DISSIPATION

To ensure proper operation and long-term reliability, the

LTC7067 must not operate beyond its maximum tem-

perature rating. Package junction temperature can be

calculated by:

TJ = TA + (PD)(θJA)

APPLICATIONS INFORMATION

where:

TJ = junction temperature

TA = ambient temperature

PD = power dissipation

θJA = junction-to-ambient thermal resistance

Power dissipation consists of standby, switching and

capacitive load power losses:

PD = PDC + PAC + PQG

where:

PDC = quiescent power loss

PAC = internal switching loss at input frequency fIN

PQG = loss due to turning on and off external MOSFET

with gate charge QG at frequency fIN

The LTC7067 consumes very little quiescent current. The

DC power loss at VCC = 10V is only (10V)(0.3mA) = 3mW.

At a particular switching frequency, the internal power

loss increases due to both AC currents required to charge

and discharge internal nodal capacitances and cross-con-

duction currents in the internal logic gates. The sum of the

quiescent current and internal switching current with no

load are shown in the Typical Performance Characteristics

plot of Switching Supply Current vs Load Capacitance.

The gate charge losses are primarily due to the large AC

currents required to charge and discharge the capacitance

of the external MOSFETs during switching. For identical

pure capacitive loads CLOAD on BG and TG at switching

frequency fIN, the load losses would be:

PCLOAD = (CLOAD)(fIN)[(VG1VCC-G1RTN)2 +

(VG2VCC-G2RTN)2]

In a typical synchronous buck configuration, the VCC is

connected to the power for the bottom MOSFET driver,

G2VCC. VG1VCC–G1RTN is equal to VCC – VD, where VD is

the forward voltage drop of the external Schottky diode

between VCC and G1VCC. If this drop is small relative VCC,

the load losses can be approximated as:

PCLOAD ≈ 2(CLOAD)(fIN)(VCC)2

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