AD7380 datasheet(15/31 Pages) AD

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Data Sheet

AD7380-4

Rev. 0 | Page 15 of 31

ADC TRANSFER FUNCTION

The AD7380-4 uses a 2.5 V to 3.3 V reference. The AD7380-4

converts the differential voltage of the analog inputs (AINx+ and

AINx−) into a digital output.

The conversion result is MSB first, twos complement. The LSB

size is (2 × VREF)/2N, where N is the ADC resolution. The ADC

resolution is determined by the resolution of the device chosen

and if resolution boost mode is enabled. Table 9 outlines the

LSB size expressed in microvolts for different resolutions and

reference voltage options.

The ideal transfer characteristic of the AD7380-4 is shown in

Figure 29.

+FSR – 1LSB

–FSR – 1LSB

–FSR

100 ... 000

011 ... 111

011 ... 110

011 ... 101

100 ... 010

100 ... 001

+FSR – 1.5LSB

–FSR – 0.5LSB

Figure 29. ADC Ideal Transfer Function (FSR = Full-Scale Range)

Table 9. LSB Size

Resolution (Bits)

2.5 V Reference (µV)

3.3 V Reference (µV)

76.3

100.7

19.1

25.2

AINA+

SDOA

DIGITAL HOST

(MICROPROCESSOR/

FPGA)

SCLK

1µF

3.0V

3.6V

1.65V

3.6V

VCC

VLOGIC

SDI

EXPOSED

PAD

AINA–

AINC+

AINx+

AINx–

AINC–

REFIN

REGCAP

GND

SDOC

SDOB

V+

10kΩ

1µF

VCM = VREF ÷ 2

VREF = 2.5V TO 3.3V

1µF

100Ω

VREF

AD7380-4

V+

V–

VREF

VCM

V+

V–

AIND+

AIND–

V+

V+ = 5V

REF

LDO

V–

LDO

SDOD/ALERT

NOTES

1. V– IS THE EXTERNAL SUPPLY VOLTAGE (–2.5V) FOR THE DRIVER AMPLIFIER.

2. PLACE DECOUPLING CAPACITORS CLOSE TO (IDEALLY, RIGHT UP AGAINST)

THE DEVICE SUPPLY PINS AND REFERENCE PIN.

Figure 30. Typical Application Circuit

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