AD7380 datasheet(22/31 Pages) AD

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AD7380-4

Data Sheet

Rev. 0 | Page 22 of 31

Serial 4-Wire Mode

Configure 4-wire mode by setting the SDO bits to 0b10 in the

CONFIGURATION2 register. In 4-wire mode, the conversion

results for ADC A is output on SDOA, ADC B on SDOB, ADC

C on SDOC, and ADC D on SDOD.

Serial 2-Wire Mode

Configure 2-wire mode by setting the SDO bits to 0b00 in the

CONFIGURATION2 register. In 2-wire mode, the conversion

results for ADC A and ADC C are output on SDOA. The

conversion result for ADC B and ADC D are output on SDOB.

Serial 1-Wire Mode

In applications where slower throughput rates are allowed or

normal averaging oversampling is used the serial interface can

be configured to operate in 1-wire mode. In 1-wire mode, the

conversion results from ADC A, ADC B, ADC C, and ADC D

are output on SDOA. Additional SCLK cycles are required to

propagate all data. ADC A data is output first followed by the

ADC B, ADC C, and ADC D conversion results.

LOW LATENCY READBACK

The interface on the AD7380-4 has a one-cycle latency as shown

in Figure 38. For applications that operate at lower throughput

rates the latency of reading the conversion result can be reduced.

After the conversion time (tCONVERT) elapses, a second CS pulse

after the initial CS pulse that initiated the conversion can be

used to read back the conversion result. This operation is shown

in Figure 40

DON’T CARE

SDOA

SDOB

SDOC

SDOD

SDI

DON’T CARE

NOP

ADC A S0

ADC B S0

ADC C S0

ADC D S0

NOP

ADC A S1

ADC B S1

ADC C S1

ADC D S1

NOP

tCYC

Figure 37. Read Conversion Results, 4-Wire Mode

SDI

SDOA

INVALID

S0A

S0C

INVALID

NOP

SDOB

S0B

S0D

S1A

S1C

S1B

S1D

Figure 38. Read Conversion Results, 2-Wire Mode

SDI

SDOA

NOP

S1C

S1D

S1A

S1B

S0C

S0D

S0A

S0B

INVALID

Figure 39. Reading Conversion Results, 1-Wire Mode

SDOA, SDOB,

SCLK

TARGET SAMPLE PERIOD

INTERNAL

CNVn

DON’T CARE

CNVn + 1

DON’T CARE

RESULTn + 1

ACQ

RESULTn

SDOC, SDOD

Figure 40. Low Throughput Low Latency

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