LP5890 datasheet(17/72 Pages) TI

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Table 8-3. CC Data vs Current Ratio

CC Register (CC_R or CC_G or

CC_B)

Ratio of IOUTSET

0000 0000b

1/256

0.39%

0000 0001b

2/256

0.78%

...

0111 1111b (default)

128/256

50%

...

1111 1110b

255/256

99.61%

1111 1111b

256/256

100%

8.3.2.3 Choosing BC/CC for a Different Application

BC is mainly used for global brightness adjustment to adapt to ambient brightness, such as between day and

night, indoor and outdoor.

Suggested BC is 3h or 4h, which is in the middle of the range, allowing flexible changes in brightness up and

down.

• If the current of one color group (usually R LEDs) is close to the output maximum current (10 mA or 20 mA),

choose the maximum BC value, 7h, to prevent the constant output current from exceeding the upper limit in

case a larger BC code is input accidentally.

• If the current of one color group (usually B LEDs) is close to the output minimum current (0.2 mA), choose the

minimum BC code, 0h, to prevent the constant output current from exceeding the lower limit in case a lower

BC code is input accidentally.

The CC can be used to fine tune the brightness in 256 steps. The CC is suitable for white balance adjustment

between RGB color group. To get a pure white color, the general requirement for the luminous intensity ratio

of R, G, B LED is 5:3:2. Depending on the characteristics of the LED (Electro-Optical conversion efficiency),

the current ratio of R, G, B LED will be much different from this ratio. Usually, the Red LED needs the largest

current. Choose 255d (the maximum value) CC code for the color group that needs the largest initial current,

then choose proper CC code for the other two color groups according to the current ratio requirement of the LED

used.

8.3.3 Frequency Multiplier

The LP5890 has an internal frequency multiplier to generate the GCLK by SCLK. The GCLK frequency can be

configured by FREQ_MOD (for more details, see FC0) and FREQ_MUL (for more details, see FC0) from 40

MHz to 160 MHz. As Figure 8-4 shows, if the GCLK frequency is not higher than 80 MHz, the GCLK_MOD is set

to 0 to disable the bypass switch (enable the ½ divider), while the GCLK frequency is higher than 80 MHz, the

GCLK_MOD is set to 1 to enable the bypass switch (disable the ½ divider).

1/2

SCLK

GCLK_MUL

GCLK_MOD

GCLK

Figure 8-4. Frequency Multiplier Block Diagram

8.3.4 Line Transitioning Sequence

The LP5890 defines a timing sequence of scan line transition. T_SW is the total transitioning time.

Table 8-4 is the relation between LINE_SWT bits and the line switch time (GCLK numbers) with different internal

GCLK frequency.

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LP5890

SLVSGD5 – JULY 2021

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