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PCM1822 Datasheet(PDF) 5 Page - Texas Instruments |
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PCM1822 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 41 page ![]() 7 Specifications 7.1 Absolute Maximum Ratings over the operating ambient temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage AVDD to AVSS –0.3 3.9 V AREG to AVSS –0.3 2.0 IOVDD to VSS (thermal pad) –0.3 3.9 Ground voltage differences AVSS to VSS (thermal pad) –0.3 0.3 V Analog input voltage Analog input pins voltage to AVSS –0.3 AVDD + 0.3 V Digital input voltage Digital input pins voltage to VSS (thermal pad) –0.3 IOVDD + 0.3 V Temperature Operating ambient, TA –40 125 °C Junction, TJ –40 150 Storage, Tstg –65 150 (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions MIN NOM MAX UNIT POWER AVDD, AREG(1) Analog supply voltage AVDD to AVSS (AREG is generated using onchip regulator) - AVDD 3.3-V operation 3.0 3.3 3.6 V IOVDD IO supply voltage to VSS (thermal pad) - IOVDD 3.3-V operation 3.0 3.3 3.6 V IO supply voltage to VSS (thermal pad) - IOVDD 1.8-V operation 1.65 1.8 1.95 INPUTS Analog input pins and FMT0 voltage to VSS 0 AVDD V Digital input pins voltage(except FMT0) to VSS (thermal pad) 0 IOVDD V TEMPERATURE TA Operating ambient temperature –40 125 °C OTHERS Digital input pin used as MCLK input clock frequency 36.864 MHz CL Digital output load capacitance 20 50 pF (1) AVSS and VSS (thermal pad): all ground pins must be tied together and must not differ in voltage by more than 0.2 V. www.ti.com PCM1822 SBASAK0 – DECEMBER 2020 – REVISED MAY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: PCM1822 |
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