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PS10 Datasheet(PDF) 11 Page - Supertex, Inc |
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PS10 Datasheet(HTML) 11 Page - Supertex, Inc |
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11 / 13 page ![]() PS10/PS11 11 A051204 Increasing the Under and Over Voltage Hysteresis, continued RTB 16.5k 9.76k 487k RTD RTC TB OV UV V TC PWRGD-C PWRGD-D TD PWRGD-A PWRGD-B PS11 -48V GND Note: 1. Other power good outputs will have the same configuration as PWGRGD-A for Active Low Enabled Converters. 2. Over voltage shut down set to 63.6V 10nF Ramp COM +3.3V V- V+ DC/DC Converter /EN Ruvhys 499k 10k V IN EE Ruvhys can be calculated based on higher UV On voltage (say 42V): Ruvhys = (Vuvon - Vdiode - Vce/((Vin-Vuvon)/487k - Vuvon/16.5k) = (1.22-0.65-0.1)/((42-1.22)/487k - 1.22/16.5k) = 47.97k Power Down Sequencing In some applications, a power down sequence may be required. To accomplish this, a capacitor is connected to the power good pins that need to be sequenced down. The power good turn off delays can be approximated by TPWRGD-B(off) = C1 x VENOFF / IPULLUP , TPWRGD-C(off) = C2 x VENOFF / IPULLUP , TPWRGD-D(off) = C3 x VENOFF / IPULLUP , where: TPWRGD-B(off) -Time delay from PWRGD-A going High to PWRGD-B going high. TPWRGD-c(off) -Time delay from PWRGD-A going High to PWRGD-C going high. TPWRGD-D(off) -Time delay from PWRGD-A going High to PWRGD-D going high. VENOFF - DC/DC minimum off voltage (2.7V typ) IPULLUP - DC/DC /EN pin pull-up current (1mA typ) Note: Adding C1, C2, C3 will have a negligible affect on the power good fall time. RTB 9.76K 6.81K 487K RTD RTC 10nF C1 C3 C2 -48V GND PWRGD-C DC/DC Converter /EN PWRGD-B V- V+ PS11 PWRGD-A Notes: 1. Under Voltage Shutdown (UV) set to 37V. 2. Over Voltage Shutdown (OV) to 57.8V. 3. Only PWRGD-A to DC/DC converter connection is shown for simplicity. PWRGD-D TD TC TB +3.3V COM Ramp /EN3 /EN2 OV UV /EN4 V EE IN V |
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