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L6711 Datasheet(PDF) 3 Page - STMicroelectronics

Part # L6711
Description  3 PHASE CONTROLLER WITH DYNAMIC VID AND SELECTABLE DACs
PDF  38 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6711 Datasheet(HTML) 3 Page - STMicroelectronics

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L6711
Figure 3. Pin Connections (Top view)
Table 4. Pin Function
Name
Description
1
VCCDR1
Channel 1 LS driver supply: it can be varied from 5V to 12V buses.
It must be connected together with other VCCDRx pins.
Filter locally with at least 1
µF ceramic cap vs. PGND1.
2
LGATE1
Channel 1 LS driver output.
A little series resistor helps in reducing device-dissipated power.
3
PGND1
Channel 1 LS driver return path.
Connect to Power Ground Plane.
4
VCC
Device supply voltage. The operative supply voltage is 12V ±15%.
Filter with 1
µF capacitor (Typ.) vs. SGND.
5
SGND
All the internal references are referred to this pin. Connect it to the PCB signal ground.
6
OFFSET Offset programming pin, internally fixed at 1.240V.
Short to SGND to disable the offset generation or connect through a resistor ROFFSET to SGND
to program an offset (positive or negative, depending on TC status) to the regulated output volt-
age as reported in the relative section.
7
COMP
This pin is connected to the error amplifier output and is used to compensate the control feed-
back loop.
8
FB
This pin is connected to the error amplifier inverting input and is used to compensate the voltage
control feedback loop.
Connecting a resistor between this pin and VSEN pin allows programming the droop effect.
9
OVP
Over Voltage protection setup pin: it allows programming the OVP intervention.
Internally pulled-up to 5V, it sources a constant 12.5
µA current.
Leaving the pin floating the OVP threshold is set to 115% (Typ.) of the programmed voltage
Connecting a resistor ROVP to SGND, it sets the OVP threshold to a fixed programmable voltage
(see relevant section for further details). Filter with 10nF vs. SGND in this case.
10
VSEN
Manages Over&Under-voltage conditions. It is internally connected with the output of the
Remote Sense Buffer for Remote Sense of the regulated voltage.
If no Remote Sense is implemented, connect it directly to the regulated voltage in order to man-
age OVP and UVP.
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
36 35 34 33 32 31 30 29 28 27 26 25
123456789
10 11 12
OUTEN
CS1-
CS1+
CS2-
CS2+
CS3-
CS3+
TC
CS_SEL
OSC / FAULT
VID5
VID0
N.C.
PHASE1
UGATE1
BOOT1
BOOT2
UGATE2
PHASE2
VCCDR2
LGATE2
PGND2
VCCDR3
N.C.
L6711



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