L6711 datasheet(33/38 Pages) STMICROELECTRONICS

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L6711

absorb energy and it can cause damages. The voltage spikes must be limited by proper layout; by the

use of gate resistors, Schottky diodes in parallel to the low side mosfets and/or snubber network on the

low side mosfets, and cannot overcome 26V, for 20nSec, at FSW = 600kHz.

■ Boot Capacitor Extra Charge. Systems that do not use Schottky diodes might show big negative spikes

on the phase pin. This spike can be limited as well as the positive spike but has an additional

consequence: it causes the bootstrap capacitor to be over-charged. This extra-charge can cause, in the

worst case condition of maximum input voltage and during particular transients, that boot-to-phase

voltage overcomes the abs. max. ratings also causing device failures. It is then suggested in this cases

to limit this extra-charge by adding a small resistor in series to the boot diode (one resistor can be

enough for all the three diodes if placed upstream the diode anode, see Figure 24).

18.3 Current Sense Connections.

Remote Buffer:

The input connections for this component must be routed as parallel nets from the FBG/

FBR pins to the load in order to compensate losses along the output power traces and also to avoid the

pick-up of any common mode noise. Connecting these pins in points far from the load will cause a non-

optimum load regulation, increasing output tolerance.

Current Reading:

The Rg resistors have to be placed as close as possible to the CSx- and CSx+ pins in

order to limit the noise injection into the device; this is still valid also for the Rg(RC)-Cg network used when

sensing current across the inductor. The PCB traces connecting these resistors to the reading point must

use dedicated nets, routed as parallel traces in order to avoid the pick-up of any common mode noise.

Figure 25. Device orientation (left) and sense nets routing (right: red for Lsense, black for LSsense)

It's also important to avoid any offset in the measurement and, to get a better precision, to connect the

traces as close as possible to the sensing elements. Symmetrical layout is also suggested.

Small filtering capacitor can be needed between VOUT and SGND on the CSx- line, placed near the con-

troller, allowing higher layout flexibility in the current sense connection.

VCCDR

L6711 Datasheet(PDF) 33 Page - STMicroelectronics