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AD8312 Datasheet(PDF) 11 Page - Analog Devices |
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AD8312 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 13 page ![]() Preliminary Technical Data AD8312 Rev. PrA| Page 11 of 13 APPLICATIONS BASIC CONNECTIONS Figure 22 shows connections for the basic measurement mode. A supply voltage of 2.7 V to 5.5 V is required. The supply to the VPOS pin should be decoupled with a low inductance 0.1 µF surface mount ceramic capacitor. A series resistor of about 10 Ω may be added; this resistor will slightly reduce the supply voltage to the AD8312 (maximum current into the VPOS pin is approximately 9 mA when VOUT is delivering 5 mA). Its use should be avoided in applications where the power supply voltage is very low (i.e., 2.7 V). A series inductor will provide similar power supply filtering with minimal drop in supply voltage. Figure 22. Basic Connections for Operation in Measurement Mode The AD8312 has an internal input coupling capacitor. This eliminates the need for external ac-coupling. A broadband input match is achieved in this example by connecting a 52.3 Ω resistor between RFIN and ground. This resistance combines with the internal input impedance of approximately 3 kΩ to give an overall broadband input resistance of 50 Ω. The measurement mode is selected by connecting VSET to VOUT, which establishes a feedback path and sets the logarithmic slope to its nominal value. The peak voltage range of the measurement extends from −45 dBm to 0 dBm at 0.9 GHz, and only slightly less at higher frequencies up to 2.5 GHz. At a slope of 21.5 mV/dB, this would amount to an output span of 967 mV. Figure 23 shows the transfer function for VOUT at a supply voltage of 3 V, and input frequency of 0.9 GHz. The load resistance on VOUT should not be lower than 10 kΩ in order that the full-scale output of 1 V can be generated with the limited available current of 200 µA max. Figure 23 shows the logarithmic conformance under the same conditions. Figure 23. VOUT and Log Conformance Error vs. Input Level vs. Input Level EVALUATION BOARD Figure 24 shows the schematic of the AD8312 evaluation board. The layout and silkscreen of the component and circuit sides are shown in Figure 25 to Figure 28. The board is powered by a single supply in the range, 2.7 V to 5.5 V. The power supply is decoupled by a single 0.1 µF capacitor. Table 4 details the various configuration options of the evaluation board. Figure 24. Evaluation Board Schematic |
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