| Electronic Components Datasheet Search |
|
FXLS8974CF Datasheet(PDF) 24 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
FXLS8974CF Datasheet(HTML) 24 Page - NXP Semiconductors |
|
24 / 96 page ![]() NXP Semiconductors FXLS8974CF 3-Axis Low-g Accelerometer Callout Current mode Next mode Transition criteria Standby WAKE BT_MODE = GND: Set SENS_CONFIG1[ACTIVE] = 1 BT_MODE = VDD: The SENS_CONFIG1[ACTIVE] bit is set automatically after the BOOT process completes when the INT1/MOT_DET pin is held high. The host may also manually set this bit using the I2C or SPI interfaces to resume motion detection mode after changing the device configuration (after entering Standby mode from WAKE mode via register command) 7 WAKE Standby BT_MODE = GND: Set SENS_CONFIG1[ACTIVE] = 0 BT_MODE = VDD: The SENS_CONFIG1[ACTIVE] bit clears automatically when the INT1/MOT_DET pin is brought low for ≥ TMOT_HIB ms; The host may also manually clear this bit using the I2C or SPI interfaces in order to change the default device configuration. WAKE SLEEP When ASLP_CNT ≥ 1, the device transitions to the SLEEP mode when none of the configured AWS interrupt sources clear the Auto-Wake/Sleep timer before it expires (host programmed ASLP_CNT value is reached), allowing the device to conserve energy by automatically using a lower ODR and/or power (performance) mode. 8 SLEEP WAKE One or more of the configured AWS event sources triggers the exit from SLEEP mode and entry into WAKE. Table 16. Operating modes transition criteria...continued [1] The host may also set SENS_CONFIG5[HIBERNATE_EN] = 1 to enter Hibernate mode, but a logic state transition on the SPI_CS_B / WAKE_UP pin does not cause the device to exit Hibernate mode when BT_MODE = VDD. 2 1 Operating mode Operating mode VDD-min VDD pin level 3 4 5 6 BOOT TBOOT2 TPULSE-BOOT2 TPULSE-WIN TBOOT2 aaa-040847 MOT_DET BOOT Hibernate OFF Hibernate Motion Detection mode BOOT_OUT (external pull-up to VDD) MOT_DET + BOOT_OUT (wired-AND, no BOOT_OUT pull-up to VDD) TPULSE-MOT TMOT-HIB TPULSE-BOOT2 TFLT-MOT_DET TPULSE-THRESx TPULSE-WIN Figure 15. BOOT2 sequence and One-wire motion-detection protocol diagram (BT_MODE = VDD) FXLS8974CF All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 1.5 — 11 March 2022 24 / 96 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |