2EDFX datasheet(21/41 Pages) INFINEON

21 / 41 page

Final datasheet

Rev.2.7

2021-09-10

EiceDRIVER™ 2EDi product family

2EDSx reinforced, 2EDFx functional isolated 4A/8A, 1A/2A gate drivers

Device characteristics

4.5

Functional and reinforced isolation specifications

Each individual part number and package variant has its own safety isolation characteristic due to package

dimension and respective isolation test voltages and methods applied. The table heading references each unique

part number.

For reinforced safety, the regulatory tests described in the component and system standards are applied by

Infineon. For functional isolation, the outlined in-house test methods have been applied.

As soon as the regulatory certificates are available, the reference and or documents will become available for

public download on the Infineon website www.infineon.com/2EDi

Note:

Final creepage and clearance of component, must be verified in conjunction with PCB design layout

and manufacturing choice like PCB material (CTI), stubs, graves, lacquer which might increase or

reduce safety distances. Meeting the isolation requirements on system level is therefore the

responsibility of the application owner.

4.5.1

Functional isolation specifications

4.5.1.1

Functional isolation of devices in PG-TFLGA-13-1 package

The PG-TFLGA-13-1 package is available for 2EDF7275K and 2EDF7235K. The isolation related parameters are

shown in Table 18, Table 19 and Table 20; for a component with basic or reinforced safety approval, choose a

different part number (e.g. Chapter 4.5.2: 2EDS8265H, 2EDS9265H and 2EDS8165H)

Table 18

Functional isolation input-to-output (PG-TFLGA-13-1)

Parameter

Symbol

Values

Unit Note or Test Condition

Min.

Typ.

Max.

Functional isolation test

voltage

VIO

1500

–

VDC

Impulse test >10 ms,

production tested

Maximum isolation working

voltage

VIOWM

460

–

VRMS according to IEC 60664-1

(PD 2; MG II)

Package clearance

CLR

–

3.4

–

mm Shortest distance over

air, from any input pin to

any output pin

Package creepage

CPG

–

3.4

–

mm Shortest distance over

surface, from any input

pin to any output pin

Common Mode Transient

Immunity

CMTI

150

–

V/ns according to DIN V VDE

V0884-11, static and

dynamic test

Capacitance input-to-output

CIO

–2–

1) not subject to production test - specified by design

Resistance input-to-output

RIO

–

>1000

–

MΩ 2)

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