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STA350B Datasheet(PDF) 48 Page - STMicroelectronics |
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STA350B Datasheet(HTML) 48 Page - STMicroelectronics |
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48 / 94 page ![]() Register description STA350B, STA350BW 48/94 DocID018572 Rev 7 8.5.8 Soft-volume update enable 8.6 Configuration register F (addr 0x05) 8.6.1 Output configuration Table 42. Soft-volume update enable Bit R/W RST Name Description 7 R/W 1 SVE 1: Volume adjustments ramp according to SVR settings 0: Volume adjustments occur immediately D7 D6 D5 D4 D3 D2 D1 D0 EAPD PWDN ECLE LDTE BCLE IDE OCFG1 OCFG0 0101 1100 Table 43. Output configuration Bit R/W RST Name Description 0R/W 0 OCFG0 Selects the output configuration 1R/W 0 OCFG1 Table 44. Output configuration engine selection OCFG[1:0] Output configuration Config pin 00 2-channel (full-bridge) power, 2-channel data-out: 1A/1B → 1A/1B 2A/2B → 2A/2B LineOut1 → 3A/3B LineOut2 → 4A/4B Line out configuration determined by LOC register 0 01 2(half-bridge).1(full-bridge) on-board power: 1A → 1A Binary 0 ° 2A → 1B Binary 90 ° 3A/3B → 2A/2B Binary 45 ° 1A/B → 3A/B Binary 0 ° 2A/B → 4A/B Binary 90 ° 0 10 2 Channel (full-bridge) power, 1 channel FFX: 1A/1B → 1A/1B 2A/2B → 2A/2B 3A/3B → 3A/3B EAPDEXT and TWARNEXT Active 0 11 1 Channel mono-parallel: 3A → 1A/1B w/ C3BO 45 ° 3B → 2A/2B w/ C3BO 45 ° 1A/1B → 3A/3B 2A/2B → 4A/4B 1 |
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