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STA350B Datasheet(PDF) 28 Page - STMicroelectronics

Part # STA350B
Description  2.1-channel high-efficiency digital audio system Sound TerminalR
PDF  94 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA350B Datasheet(HTML) 28 Page - STMicroelectronics

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Serial audio interface
STA350B, STA350BW
28/94
DocID018572 Rev 7
5
Serial audio interface
The STA350Bx audio serial input interface has been designed to interface with standard
digital audio components and to accept a number of serial data formats. The STA350Bx
always acts as the slave when receiving audio input from standard digital audio
components. Serial data for two channels is provided using three inputs: left/right clock
LRCKI, serial clock BICKI, and serial data SDI12.
The SAI bit and the SAIFB bit are used to specify the serial data format. The default serial
data format is I2S, MSB-first.
5.0.1
Timings
In the STA350Bx the BICKI and LRCKI pins are configured as inputs and they must be
supplied by the external peripheral.
Figure 18. Timing diagram for SAI interface
5.0.2
Delay serial clock enable
To tolerate anomalies in some I2S master devices, a PLL clock cycle delay can be added to
the BICKI signal before the SAI interface.
5.0.3
Channel input mapping
Each channel received via I2S can be mapped to any internal processing channel via the
channel input mapping registers. This allows for flexibility in processing. The default settings
of these registers map each I2S input channel to its corresponding processing channel.
Table 7. Timing parameters for slave mode
Symbol
Parameter
Min.
Typ.
Max.
Unit
tBCy
BICK cycle time
80
-
-
ns
tBCH
BICK pulse width high
40
-
-
ns
tBCL
BICK pulse width low
40
-
-
ns
tLRSU
LRCKI setup time to BICKI strobing edge
40
-
-
ns
tLRH
LRCKI hold time to BICKI strobing edge
40
-
-
ns
tLRJT
LRCKI jitter tolerance
40
ns
tBCy
tLRH
tLRSU
LRCKI
BICKI
SDI12
tBCH
tBCL
80%
40%



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