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STA350B Datasheet(PDF) 68 Page - STMicroelectronics

Part # STA350B
Description  2.1-channel high-efficiency digital audio system Sound TerminalR
PDF  94 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA350B Datasheet(HTML) 68 Page - STMicroelectronics

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Register description
STA350B, STA350BW
68/94
DocID018572 Rev 7
8.12.12
Coefficient a2 data register bits 15:8
8.12.13
Coefficient a2 data register bits 7:0
8.12.14
Coefficient b0 data register bits 23:16
8.12.15
Coefficient b0 data register bits 15:8
8.12.16
Coefficient b0 data register bits 7:0
8.12.17
Coefficient write/read control register
Coefficients for user-defined EQ, mixing, scaling, and bass management are handled
internally in the STA350Bx via RAM. Access to this RAM is available to the user via an I2C
register interface. A collection of I2C registers are dedicated to this function. One contains a
coefficient base address, five sets of three store the values of the 24-bit coefficients to be
written or that were read, and one contains bits used to control the write/read of the
coefficient(s) to/from RAM.
Three different RAM banks are embedded in the STA350Bx. The three banks are managed
in paging mode using EQCFG register bits. They can be used to store different EQ settings.
For speaker frequency compensation, a sampling frequency independent EQ must be
implemented. Computing three different coefficients set for 32 kHz, 44.1kHz, 48 kHz and
downloading them into the three RAM banks, it is possible to select the suitable RAM block
depending on the incoming frequency with a simple I2C write operation in register 0x31.
D7
D6
D5
D4
D3
D2
D1
D0
C4B15
C4B14
C4B13
C4B12
C4B11
C4B10
C4B9
C4B8
0000
0000
D7
D6
D5
D4
D3
D2
D1
D0
C4B7
C4B6
C4B5
C4B4
C4B3
C4B2
C4B1
C4B0
0000
0000
D7
D6
D5
D4
D3
D2
D1
D0
C5B23
C5B22
C5B21
C5B20
C5B19
C5B18
C5B17
C5B16
0000
0000
D7
D6
D5
D4
D3
D2
D1
D0
C5B15
C5B14
C5B13
C5B12
C5B11
C5B10
C5B9
C5B8
0000
0000
D7
D6
D5
D4
D3
D2
D1
D0
C5B7
C5B6
C5B5
C5B4
C5B3
C5B2
C5B1
C5B0
0000
0000
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
RA
R1
WA
W1
0
0000



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