AP65455

Document number: DS37994 Rev. 3 - 4

12 of 15

www.diodes.com

October 2018

© Diodes Incorporated

AP65455

PART OBSOLETE - NO ALTERNATE PART

Application Information (Cont.)

Output Capacitor

The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The

output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it

supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited

by the inductor value.

Maximum capacitance required can be calculated from the following equation:

ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below:

ESR

*

ΔI

V

INDUCTOR

OUT_RIPPLE 

An output capacitor with ample capacitance and low ESR is the best option. For most applications, a 22µF to 68µF ceramic capacitor will be

sufficient.

2

OUT

2

OUT

2

INDUCTOR

OUT

O

V

)

V

V

(

Δ

)

2

ΔI

L(I

C









Where

ΔV is the maximum output voltage overshoot.

Bootstrap Capacitor

To ensure the proper operation, a ceramic capacitor must be connected between the VBST and SW pin. A 0.1µF ceramic capacitor is sufficient.

External Bootstrap Diode

It is recommended to add an external bootstrap diode between an external 5V and the BST pin for efficiency improvement when input voltage is

lower than 5.5V. The bootstrap diode can be a low cost one such as 1N4148 or BAT54. The external 5V can be a 5V fixed input from system or a

5V output of the AP65453. Note that the external bootstrap voltage must be lower than 5.5V.

Figure 6 External Bootstrap Diode

VREG5 Capacitor

To ensure the proper operation, a ceramic capacitor must be connected between the VREG5 and PGND pin. A 1µF ceramic capacitor is sufficient.

PC Board Layout

1.

The AP65455 works at 4A load current, heat dissipation is a major concern in layout the PCB. A 2oz Copper in both top and bottom

layer is recommended.

2.

Provide sufficient vias in the thermal exposed pad for heat dissipate to the bottom layer.

3.

Provide sufficient vias in the Output capacitor PGND side to dissipate heat to the bottom layer.

4.

Make the bottom layer under the device as PGND layer for heat dissipation. The PGND layer should be as large as possible to provide

better thermal effect.

5.

Make the VIN capacitors as close to the device as possible.

6.

Make the VREG5 capacitor as close to the device as possible.

7.

The thermal pad of the device should be soldered directly to the PCB exposed copper plane to work as a heatsink. The thermal vias in

the exposed copper plane increase the heat transfer to the bottom layer.

Figure 7 PC Board Layout