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TC387 Datasheet(PDF) 186 Page - Infineon Technologies AG |
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TC387 Datasheet(HTML) 186 Page - Infineon Technologies AG |
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186 / 416 page ![]() TC38x AD/AE-Step Pin Definition and Functions BGA292 Package Variant Pin Configuration Data Sheet 186 V 1.2, 2021-03 B7 P10.1 I FAST / PU1 / VEXT / ES General-purpose input GTM_TIM4_IN4_12 Mux input channel 4 of TIM module 4 GTM_TIM1_IN1_3 Mux input channel 1 of TIM module 1 GTM_TIM0_IN1_3 Mux input channel 1 of TIM module 0 GPT120_T5EUDB Count direction control input of timer T5 QSPI1_MRSTA Master SPI data input GTM_DTMT0_1 CDTM0_DTM0 P10.1 O0 General-purpose output GTM_TOUT103 O1 GTM muxed output QSPI1_MTSR O2 Master SPI data output QSPI1_MRST O3 Slave SPI data output IOM_MON2_1 Monitor input 2 IOM_REF2_1 Reference input 2 MSC0_EN1 O4 Chip Select EVADC_FC1BFLOUT O5 Boundary flag output, FC channel 1 —O6 Reserved —O7 Reserved A5 P10.2 I FAST / PU1 / VEXT / ES General-purpose input GTM_TIM4_IN5_12 Mux input channel 5 of TIM module 4 GTM_TIM1_IN2_3 Mux input channel 2 of TIM module 1 GTM_TIM0_IN2_3 Mux input channel 2 of TIM module 0 CAN02_RXDE CAN receive input node 2 MSC0_SDI1 Upstream assynchronous input signal QSPI1_SCLKA Slave SPI clock inputs GPT120_T6INB Trigger/gate input of core timer T6 SCU_E_REQ2_0 ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) GTM_DTMT2_2 CDTM2_DTM0 P10.2 O0 General-purpose output GTM_TOUT104 O1 GTM muxed output IOM_MON2_9 Monitor input 2 —O2 Reserved QSPI1_SCLK O3 Master SPI clock output MSC0_EN0 O4 Chip Select EVADC_FC3BFLOUT O5 Boundary flag output, FC channel 3 —O6 Reserved —O7 Reserved Table 2-28 Port 10 Functions (cont’d) Ball Symbol Ctrl. Buffer Type Function OPEN MARKET VERSION |
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