MPC8540 datasheet(89/1302 Pages) FREESCALE

89 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

lxxxix

CCSR

Configuration control and status register

CEPT

Conference des administrations Europeanes des Postes et Telecommunications (European

Conference of Postal and Telecommunications Administrations).

COL

Collision

CRC

Cyclic redundancy check

CRS

Carrier sense

DDR

Double data rate

DMA

Direct memory access

DPLL

Digital phase-locked loop

DRAM

Dynamic random access memory

DUART

Dual universal asynchronous receiver/transmitter

Effective address

ECC

Error checking and correction

ECM

e500 coherency module

EEST

Enhanced Ethernet serial transceiver

EHPI

Enhanced host port interface

EPROM

Erasable programmable read-only memory

FCS

Frame-check sequence

GCI

General circuit interface

GMII

Gigabit media independent interface

GPCM

General-purpose chip-select machine

GPIO

General-purpose I/O

GPR

General-purpose register

GUI

Graphical user interface

HDLC

High-level data link control

I2C

Inter-integrated circuit

IDL

Inter-chip digital link

IEEE

Institute of Electrical and Electronics Engineers

IPG

Interpacket gap

IrDA

Infrared Data Association

ISDN

Integrated services digital network

ITLB

Instruction translation lookaside buffer

Integer unit

Table 1. Acronyms and Abbreviated Terms (continued)

Term

Meaning

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