MPC8540 datasheet(93/1302 Pages) FREESCALE

93 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

I-1

Part I

Overview

Part I describes the many features of the MPC8540 integrated host processor at an overview level.

The following chapters are included:

•

Chapter 1, “Overview”

•

Chapter 2, “Memory Map”

•

Chapter 3, “Signal Descriptions”

•

Chapter 4, “Reset, Clocking, and Initialization”

Chapter 1, “Overview,” provides a high-level description of features and functionality of the

MPC8540 integrated host processor. It describes the MPC8540, its interfaces, and its

programming model. The functional operation of the MPC8540 with emphasis on peripheral

functions is also described.

Chapter 2, “Memory Map,” describes the MPC8540 memory map. An overview of the local

address map is followed by a description of how local access windows are used to define the local

address map. The inbound and outbound address translation mechanisms used to map to and from

external memory spaces are described next. Finally, the configuration, control, and status registers

are described, including a complete listing of all memory mapped registers with cross references

to the sections detailing descriptions of each.

Chapter 3, “Signal Descriptions,” provides a listing of all the external signals, cross-references for

signals that serve multiple functions, output signal states at reset, and reset configuration signals

(and the modes they define).

Chapter 4, “Reset, Clocking, and Initialization,” describes the hard and soft resets, the power-on

reset sequence, power-on reset (POR) configuration, clocking, and initialization of the MPC8540.

MPC8540 Datasheet(PDF) 93 Page - Freescale Semiconductor, Inc