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LPC43S30 Datasheet(PDF) 21 Page - NXP Semiconductors

Part # LPC43S30
Description  32-bit ARM Cortex-M4/M0 flashless MCU with security features; up to 264 kB SRAM, Ethernet; two HS USBs, AES engine, LCD, EMC, SPIFI
PDF  156 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC43S30 Datasheet(HTML) 21 Page - NXP Semiconductors

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LPC43S50_S30_S20
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2020. All rights reserved.
Product data sheet
Rev. 1.3 — 20 January 2020
21 of 156
NXP Semiconductors
LPC43S50/S30/S20
32-bit ARM Cortex-M4/M0 microcontroller
P3_4
A15
C14
B8
119 [2] N;
PU
I/O GPIO1[14] — General purpose digital input/output pin.
-
R — Function reserved.
-
R — Function reserved.
I/O SPIFI_SIO3 — I/O lane 3 for SPIFI.
O
U1_TXD — Transmitter output for UART 1.
I/O I2S0_TX_WS — Transmit Word Select. It is driven by the
master and received by the slave. Corresponds to the signal
WS in the I2S-bus specification.
I/O I2S1_RX_SDA — I2S1 Receive data. It is driven by the
transmitter and read by the receiver. Corresponds to the signal
SD in the I2S-bus specification.
O
LCD_VD13 — LCD data.
P3_5
C12
C11
B7
121 [2] N;
PU
I/O GPIO1[15] — General purpose digital input/output pin.
-
R — Function reserved.
-
R — Function reserved.
I/O SPIFI_SIO2 — I/O lane 2 for SPIFI.
I
U1_RXD — Receiver input for UART 1.
I/O I2S0_TX_SDA — I2S transmit data. It is driven by the
transmitter and read by the receiver. Corresponds to the signal
SD in the I2S-bus specification.
I/O I2S1_RX_WS — Receive Word Select. It is driven by the
master and received by the slave. Corresponds to the signal
WS in the I2S-bus specification.
O
LCD_VD12 — LCD data.
P3_6
B13
B12
C7
122 [2] N;
PU
I/O GPIO0[6] — General purpose digital input/output pin.
I/O SPI_MISO — Master In Slave Out for SPI.
I/O SSP0_SSEL — Slave Select for SSP0.
I/O SPIFI_MISO — Input 1 in SPIFI quad mode; SPIFI output IO1.
-
R — Function reserved.
I/O SSP0_MISO — Master In Slave Out for SSP0.
-
R — Function reserved.
-
R — Function reserved.
P3_7
C11
C10
D7
123 [2] N;
PU
-
R — Function reserved.
I/O SPI_MOSI — Master Out Slave In for SPI.
I/O SSP0_MISO — Master In Slave Out for SSP0.
I/O SPIFI_MOSI — Input I0 in SPIFI quad mode; SPIFI output IO0.
I/O GPIO5[10] — General purpose digital input/output pin.
I/O SSP0_MOSI — Master Out Slave in for SSP0.
-
R — Function reserved.
-
R — Function reserved.
Table 3.
Pin description …continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.
Symbol
Description



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