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LPC43S30 Datasheet(PDF) 6 Page - NXP Semiconductors

Part # LPC43S30
Description  32-bit ARM Cortex-M4/M0 flashless MCU with security features; up to 264 kB SRAM, Ethernet; two HS USBs, AES engine, LCD, EMC, SPIFI
PDF  156 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC43S30 Datasheet(HTML) 6 Page - NXP Semiconductors

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LPC43S50_S30_S20
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2020. All rights reserved.
Product data sheet
Rev. 1.3 — 20 January 2020
6 of 156
NXP Semiconductors
LPC43S50/S30/S20
32-bit ARM Cortex-M4/M0 microcontroller
5. Block diagram
(1) Not available on all parts (see Table 2).
Fig 1.
LPC43S50/S30/S20 Block diagram
ARM
CORTEX-M4
TEST/DEBUG
INTERFACE
DMA
LCD(1)
SD/
MMC
ETHERNET(1)
10/100
MAC
IEEE 1588
HIGH-SPEED
USB0(1)
HOST/
DEVICE/OTG
HIGH-SPEED
USB1(1)
HOST/DEVICE
EMC
HIGH-SPEED PHY
32 kB AHB SRAM
16 +16 kB AHB SRAM
SPIFI
AES ENCRYPTION/
DECRYPTION
HS GPIO
SPI
SGPIO
SCT
64 kB ROM
I2C0
I2S0
I2S1
C_CAN1
MOTOR
CONTROL
PWM(1)
TIMER3
TIMER2
USART2
USART3
SSP1
RI TIMER
QEI(1)
GIMA
BRIDGE 0
BRIDGE 1
BRIDGE 2
BRIDGE 3
BRIDGE
BRIDGE
AHB MULTILAYER MATRIX
LPC43S50/30/20
128 kB LOCAL SRAM
72 kB LOCAL SRAM
10-bit ADC0
10-bit ADC1
C_CAN0
I2C1
10-bit DAC
BRIDGE
RGU
CCU2
CGU
CCU1
ALARM TIMER
CONFIGURATION
REGISTERS
OTP MEMORY
EVENT ROUTER
POWER MODE CONTROL
12 MHz IRC
RTC POWER DOMAIN
BACKUP REGISTERS
RTC OSC
RTC
aaa-013539
slaves
slaves
masters
ARM
CORTEX-M0
TEST/DEBUG
INTERFACE
= connected to GPDMA
GPIO
INTERRUPTS
GPIO GROUP0
INTERRUPT
GPIO GROUP1
INTERRUPT
WWDT
USART0
UART1
SSP0
TIMER0
TIMER1
SCU



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