8.2.1.3 Application Curves

Figure 8-2 and Figure 8-3 show eye diagrams for USB 2.0 signals through calibration traces (without device) and

TMUXHS221 channel. A combination of very low channel ON resistance, high bandwidth, very low reflection

(retun loss), and low added jitter from the device allows 480 MBps USB 2.0 HS signals to stay almost

unattenuated. Many system platforms struggle to pass USB 2.0 compliance due to high loss. TMUXHS221

allows insertion of an analog mux device in the signal path without creating any additional signal integrity

challenge.

Figure 8-2. USB 2.0 HS Compliance Eye in TI

Evaluation Board – Through Calibration Traces

Figure 8-3. USB 2.0 HS Compliance Eye in TI

Evaluation Board – Through TMUXHS221 Channel

8.3 Systems Examples

8.3.1 PCIe Clock Muxing

Figure 8-4 shows an application where TMUXHS221 is used to switch the PCIe clock. The device is measured in

a TI evaluation board with an available clock source to show an added jitter less than 10 fs for all NOISE_FOLD

and PCIe 5.0 CK filter versions, which is well below PCIe 5.0 clock specifications.

D+

D-

DB+

DB-

DA+

DA-

SEL

OEn

Local

Clock

VCC

GND

1

F

0.1

F

Incoming CK

Local CK

Forwarded CK

Figure 8-4. PCIe Clock Muxing

TMUXHS221

SLASF52A – AUGUST 2022 – REVISED NOVEMBER 2022

www.ti.com

12

Submit Document Feedback

Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: TMUXHS221