ISL62776IRTZ datasheet(14/50 Pages) RENESAS

14 / 50 page

ISL62776

3. Theory of Operation

R16DS0044EU0200 Rev.2.00

Page 14 of 49

Oct.8.20

Each slave circuit has its own ripple capacitor Crs; whose voltage mimics the inductor ripple current. A gm

amplifier converts the inductor voltage into a current source to charge and discharge Crs. The slave circuit turns

on its PWM pulse when it receives the clock signal and the current source charges Crs. When the Crs voltage VCrs

reaches VW, the slave circuit turns off the PWM pulse and the current source discharges Crs.

Because the controller works with VCrs, which is a large amplitude and noise-free synthesized signal, it achieves

lower phase jitter than conventional hysteretic mode and fixed PWM mode controllers. Unlike conventional

hysteretic mode converters, the error amplifier allows the ISL62776 to maintain a 0.5% output voltage accuracy.

Figure 8 shows the operational principles during load insertion response. The COMP voltage rises during load

insertion, quickly generating the master clock signal, so the PWM pulses turn on earlier to increase the effective

switching frequency, allowing for higher control loop bandwidth than conventional fixed frequency PWM

controllers. The VW voltage rises as the COMP voltage rises, making the PWM pulses wider. During load release

response, the COMP voltage falls. The master clock circuit takes longer to generate the next master clock signal

so the PWM pulse is held off until needed. The VW voltage falls as the COMP voltage falls, reducing the current

PWM pulse-width. This behavior gives the ISL62776 excellent response speed.

All the phases share the same VW window voltage, ensuring excellent dynamic current balance among phases.

Figure 7. R3 Modulator Operational Principles in Steady State

ISL62776IRTZ Datasheet(PDF) 14 Page - Renesas Technology Corp