33903 datasheet(68/107 Pages) NXP

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NXP Semiconductors

33903/4/5

SERIAL PERIPHERAL INTERFACE

10.2.5.2 Examples 1:

MOSI [bit 15-0] = 01 00 011 P 01101001, P should be 0, because the command contains 7 bits with logic 1. Thus the Exact command will

then be: MOSI [bit 15-0] = 01 00 011 0 01101001

10.2.5.3 Examples 2:

MOSI [bit 15-0] = 01 00 011 P 0100 0000, P should be 1, because the command contains 4 bits with logic 1. Thus the Exact command

will then be: MOSI [bit 15-0] = 01 00 011 1 0100 0000

10.2.5.4 Parity function selection

All SPI commands and examples do not use parity functions. The parity function is optional. It is selected by bit 6 in INIT MISC register.

If parity function is not selected (bit 6 of INIT MISC = 0), then Parity bits in all SPI commands (bit 8) must be ‘0’.

10.3

Detail of control bits and register mapping

The following tables contain register bit meaning arranged by register address, from address 0_000 to address 1_0100

10.3.1 MUX and RAM registers

Table 15. MUX Register(42)

MOSI First Byte [15-8]

[b_15 b_14] 0_0000 [P/N]

MOSI Second Byte, bits 7-0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

01 00 _ 000 P

MUX_2

MUX_1

MUX_0

Int 2K

I/O-att

Default state

Condition for default

POR, 5 V-CAN off, any mode different from Normal

Bits

Description

b7 b6 b5

MUX_2, MUX_1, MUX_0 - Selection of external input signal or internal signal to be measured at MUX-OUT pin

000

All functions disable. No output voltage at MUX-OUT pin

001

VDD regulator current recopy. Ratio is approx 1/97. Requires an external resistor or selection of Internal 2.0 K (bit 3)

010

Device internal voltage reference (approx 2.5 V)

011

Device internal temperature sensor voltage

100

Voltage at I/O-0. Attenuation or gain is selected by bit 3.

101

Voltage at I/O-1. Attenuation or gain is selected by bit 3.

110

Voltage at VSUP/1 pin. Refer to electrical table for attenuation ratio (approx 5)

111

Voltage at VSENSE pin. Refer to electrical table for attenuation ratio (approx 5)

INT 2k - Select device internal 2.0 kohm resistor between AMUX and GND. This resistor allows the measurement of a voltage proportional

to the VDD output current.

Internal 2.0 kohm resistor disable. An external resistor must be connected between AMUX and GND.

Internal 2.0 kohm resistor enable.

I/O-att - When I/O-0 (or I/O-1) is selected with b7,b6,b5 = 100 (or 101), b3 selects attenuation or gain

between I/O-0 (or I/O-1) and MUX-OUT pin

Gain is approx 2 for device with VDD = 5.0 V (Ref. to electrical table for exact gain value)

Gain is approx 1.3 for device with VDD = 3.3 V (Ref. to electrical table for exact gain value)

Attenuation is approx 4 for device with VDD = 5.0 V (Ref. to electrical table for exact attenuation value)

Attenuation is approx 6 for device with VDD = 3.3 V (Ref. to electrical table for exact attenuation value)

Notes

42.

The MUX register can be written and read only when the 5V-CAN regulator is ON. If the MUX register is written or read while 5V-CAN is OFF, the

command is ignored, and the MXU register content is reset to default state (all control bits = 0).

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